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	Special Topics
Forum Name Topics Replies Last Post Low power Designing for Low Power involves tradeoffs. How are you handling these decisions? Forum Moderator: Chris Byham 42 41 RE: Sugnalstorm Character... by david_evans 5/02/2008 10:40 AM Design Data Management Design Data Management challenges increase with multiple sites and multiple teams. Let’s develop best practices for IC design management. Forum Moderators: Britta Krueger, Chris Goldstein, and Rick Stanton 6 14 RE: Using Subversion for ... by brose@scanimetrics.com 5/12/2008 7:39 AM

	Digital IC
Forum Name Topics Replies Last Post Synthesis and test Share your global synthesis and nanometer test solutions for meeting leading edge product requirements. Forum moderator: Eric Venditti 94 250 RE: BuildGates memory err... by Naderi 5/16/2008 10:46 AM Formal verification How do you use formal verification to minimize the risk of missing critical bugs. Forum moderator: David Goldberg 69 111 RE: Regarding sample dofi... by sreenivasaraov 5/14/2008 6:43 AM Floorplanning, Place and route What place-and-route challenges are you facing when creating complex high-performance chips? Forum moderator: Li-Siang Lee 201 507 No connection between VSS... by thanhtung 5/17/2008 12:34 AM

	Custom IC
Forum Name Topics Replies Last Post Custom IC Electrical Design Schematic Entry and the Simulation Cockpit are vital tools for custom design. Share your challenges in addressing AMS design issues. Moderator: Herman Janssen 122 237 RE: "simulation data... by adbeckett 5/14/2008 12:28 PM Custom IC Physical Design Find out what's worked for other engineers, and discuss your experiences and issues working with manual and/or automated layout. 61 95 RE: DRC error AMTS maximu... by adbeckett 5/15/2008 6:49 AM Shared code - SKILL Upload your SKILL files here. Give a brief summary of how to best use the SKILL code. 101 260 RE: loading pcell callbac... by adbeckett 5/15/2008 7:04 AM

	Silicon-package-board
Forum Name Topics Replies Last Post Signal Integrity and Modeling Electricity and power…we all know the theories. How do these theories translate to the physical world? Forum moderator: Kai Keskinen and Lance Wang 151 321 .in file error in PCB SI ... by bluecad 4/26/2008 5:19 PM PCB Design From schematic to autorouting what are your challenges in producing high-speed designs? Forum moderators: Randy Bye, Charlie Davies, and Carl Musetti 760 1931 Mirroring artwork and dri... by willbertsche 5/16/2008 8:41 AM IC Package, SiP and Co-design Packaging solutions can make or break the cost budget. What design issues are you facing today? Forum moderator: Jamie Metcalf 19 34 RE: Could I assign hostna... by BillAcito 3/26/2008 10:44 AM Shared code - SKILL Upload your SKILL files here. Give a brief summary of how to best use the SKILL code. Forum moderator: Dave Elder 180 459 RE: Concept-SKILL questio... by sdurrill 5/16/2008 5:45 PM

	Functional Verification
Forum Name Topics Replies Last Post Simulation, Acceleration, Emulation What issues are you facing using acceleration and emulation? Forum moderator: Tom Paulson 49 54 RE: Spectre Syntax for Fu... by nnxx 4/23/2008 1:44 PM Assertion-Based Verification and Formal Analysis A place to share ABV and formal analysis questions, answers, and commentary. Forum moderator: Ross Weber 51 150 RE: Latch Behavior Proble... by TAM 5/15/2008 6:48 AM SystemVerilog What challenges do you face in using the SystemVerilog language for design and testbench development, assertions and IP re-use? Forum moderator: Nitin Sharma 191 658 RE: i am in need of URM c... by stephenh 5/16/2008 4:54 AM Verification Planning How does verification planning, or lack of, impact your designs? Forum moderators: Stylianos Diamantidis; Akiva Michelson 24 36 RE: Bus Functional Model by ddmello 4/17/2008 5:47 AM e How are you using e language for testbench development and IP re-use? Forum moderator: Joseph Hanli Zhang 65 187 RE: type convertor for po... by ddmello 5/15/2008 7:54 AM Shared code - e Files Upload your e Files here. Give a brief summary of how to use the code. Forum moderator: Stylianos Diamantidis 35 38 ce_tools directory no lon... by hannes 4/22/2008 3:59 AM

	Cadence Academic Network
Forum Name Topics Replies Last Post AMS Methodology FOR ACADEMIC INSTITUTIONS: Share your approaches in analog and mixed-signal methodology or ask questions. Forum Moderator: Joachim Becker 4 5 RE: How can I do Analog p... by jmbeck 4/25/2008 3:13 AM RF Methodology FOR ACADEMIC INSTITUTIONS: Share your approaches in RF design and verification methodology or ask questions. Forum Moderator: Peter Teichmann 3 2 RE: RF Design flow when i... by paulo.trevisan 5/16/2008 11:08 AM Verification Methodology FOR ACADEMIC INSTITUTIONS: Wondering how and where to use Hardware Verification Languages or formal engines? Ever heard of a Verification Plan? Share your approaches or get advice. Forum Moderator: Sven Kapferer 2 0 Posting code to the forum by Administrator 8/21/2007 10:33 AM Cadence Academic Network Member List The Who is Who of the Cadence Academic Network - Use the search function to find selected areas of competence Forum Moderator: Patrick Haspel 11 0 [CAN] University of... by jrascher 5/15/2008 4:49 AM Cadence Academic Network Announcements All Cadence Academic Network related announcements Forum Moderator: Patrick Haspel 5 2 Open position at Cadence ... by phaspel 12/05/2007 8:12 AM Cadence Academic Network Event Notices Here you can find events that are of interest for Academia. Forum Moderator: Patrick Haspel 6 7 RE: Presenations from Aca... by pw91 5/15/2008 8:47 AM Cadence Academic Network General Questions Please put here all questions related to Cadence Academic Network that are not related to one of the other forums. Forum Moderator: Patrick Haspel 5 6 RE: orcad schematic 9.2 by CODREANU 12/28/2007 12:20 AM

	General topics
Forum Name Topics Replies Last Post Suggestions Provide feedback to moderators about the forums or any other part of the site. 18 49 RE: How to modify post by jch teyssier 3/29/2008 12:12 AM Event Notices Post notices of seminars, webinars, industry meetings and other events of interest to the EDA industry at large. 18 2 Advance Analog IC Design ... by jktan 2/25/2008 8:09 PM Jobs Post jobs announcements related primarily, but not exclusively, to jobs utilizing Cadence design tools. 40 6 RE: ECAD Administrator - ... by jch teyssier 3/29/2008 12:14 AM

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