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Subject: help!!how can i do!!thanks
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upton_zhou
Posts: 0
Online: User is Offline
6/27/2006 3:31 AM  

when i use probe in pcb SI to create waveform,the error happen . in tlsim.log ,it report as below:
""

 **** Tlsim Version 14.1 ****

 Tue Jun 27 18:14:20 2006

**** Tlsim command line ****
 tlsim -r 0.200000 -EIndVsrcDc -o waveforms.sim -dl delay.dl -dst distortion.dst -log tlsim.log -ocycle cycle.msm main.spc


Number of Nodes in this circuit = 77


Statistics on N-line elements:
 Number of 'n' type multi-conductor elements = 18
 Type-of-N-element  #elms Max_Length TotalLength

 1-line-N-elm     18   0.0528074    0.163241
 Total Interconnect Length = 0.163241
 Total Coupled Length = 0

 Following is some statistics on Model usage
   Model-Type      Model-Name     Number-of-Models-in-this-circuit

   bdrvr         MPC8220_SSTL_CLK_clksstl2class2_Typical               1
   bdrvr         DQ_FULL_Typical               1
   bdrvr         256MDDR_I_O_DQ_Typical               1
  No of 'Bdrvr' type model instance = 3

 Time Step at Start = 1.86667e-011


*********************************************************
  ABORT!: MATRIX FACTORIZATION FAILURE IN DC 
*********************************************************
 possible causes of this mishap are
1. Modelling inductors as ideal inductors:
try using the switch -EIndVsrcDc in the simulator command line.
This will model the inductors with small real dc resistance.
2. Look for dc offset currents in v-i data . If you have offset currents
you certainly need dc terminations!!


**** Transient Simulation Statistics ****

    Number Of time step solutions = 0

""
i donot know how to do!

can you tell me ?

thks!!
   best regard!!

upton_zhou
Posts: 0
Online: User is Offline
6/27/2006 3:32 AM  
sorry,,can tell me the detail step?
Kalevi2
Moderator
Posts: 69
Online: User is Offline
6/27/2006 3:54 AM  
Have you tried to extract the topology to SigXP? Have you tried another buffer model in place of the driver model. If the simulation works with another buffer, this is most likely caused by a bad IBIS model with inconsistent v-t curves.

Kai Keskinen

upton_zhou
Posts: 0
Online: User is Offline
6/27/2006 6:50 PM  
thanks !!!
i tried to extract the topology to SigXP ,but i know it is not right when use this model .
i wish you can tell me how can i do now!!
thanks
upton_zhou
Posts: 0
Online: User is Offline
6/27/2006 11:35 PM  
sorry!! i have another question : where input the "tlsim" command .
where "simulator command line"
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