Thursday, November 20, 2008     Register | Login | Search | Contact Us
     
   
     
     

Many of you already received communications about the move of the Cadence user community into cadence.com. And many of you have already joined, with over 4000 registrations in the first two weeks.

The new Cadence Community enhances the ability of Cadence users to connect and collaborate. In addition to moving the community into cadence.com -- enabling single sign-on for community, Sourcelink and Cadence events -- the new site is organized around nine technology segments, giving you easy access to product information, training, forums and blogs. Some of the new features include:
  • Ability to respond to posts via e-mail
  • Technology-specific blogs
  • Latest Web 2.0 social networking capabilities
  • Public profile options
  • Private messaging
  • Friends lists
Visit the new Cadence Community today at www.cadence.com/community and join the discussions!

Registration note: Due to the scope of the enhancements and the new SSO registration system, we were not able to migrate existing cdnusers.org member accounts. So new registrations are required, but this enables a broader set of functionality we think you'll enjoy.

Forum note: Under the guidance of forum moderators, we have taken the 20+ cdnusers.org forums and consolidated them into 11 forums on the new site. Posts have been brought over so you can leverage that posting history. CDNusers forums will be set to read only starting 7/30, and cdnusers.org will be redirected to the new community on 8/4.

Best regards,
Mike and Tom

Michael A. Catrambone - Steering Committee Chairman
Distinguished Engineer
PCB/Mechanical
UTStarcom, Inc.

Tom Diederich
Cadence Community Manager
Home
Forums
Forums > Silicon-package-board > Signal Integrity and Modeling

Subject: Package model
Posting to forums is available to community members only.
Login or Register
Rate this topic:
   
Author Messages
pramod_si
Posts: 8
Online: User is Offline
4/17/2007 12:12 PM  
Hi In one of my IBIS files, I have the R,L,C_pkg as 0, and have another .rlc file which gives the package model. Is it possible to include this .rlc file in simulation with IBIS models? Thanks Pramod
Kalevi2
Moderator
Posts: 69
Online: User is Offline
4/18/2007 10:35 AM  
One way is to merge the IBIS file and the package file as follows
|************************************************************************
| Component my_device
|************************************************************************
[Component] my_device
[Manufacturer] xyznetworks Inc.
[package]
| variable typ min max
R_pkg 70.00m NA NA
L_pkg 1.20nH NA NA
C_pkg 2.1pF NA NA
|
[Package Model] compiled_pkg
|
[Pin] signal_name model_name R_pin L_pin C_pin
|
...

8.75000e-09 8.06985e-01 6.83135e-01 7.55377e-01
|
|
| End Model SSTL18_50
|
[Define Package Model] compiled_pkg
[Manufacturer] xyznetworks
[OEM] Coresim
[Description] xls2pkg
[Number Of Sections] 2
[Number Of Pins] 781
[Pin Numbers]
|
|List |

N33 Len=0 L =1.67nH C =0.44pF/
Len=1 L=12.53nH C=3.01pF R=751.55m /
L33 Len=0 L =1.3nH C =0.34pF/
Len=1 L=9.71nH C=2.33pF R=582.33m /
P33 Len=0 L =0.97nH C =0.25pF/
...
Kai Keskinen
pramod_si
Posts: 8
Online: User is Offline
4/18/2007 10:45 AM  
Hi Keskinen
Thanks for ur response.
This is the way I did the simulation. Pls comment if it makes sense.
Since I have the IBIS model and a seperate package model which is a three line model, I converted that 3 line model to ESPICE black box using MI and used that after the buffer model for the IC. Will this be ok? Will this take care of the package parasetics of the chip? Pls comment.
Thanks
Pramod
Kalevi2
Moderator
Posts: 69
Online: User is Offline
4/18/2007 11:00 AM  
Your apporach is fine for SigXP simulations. You should hook up 3 buffer pins to the black box on the device side and either terminate with 50 Ohms to ground the unused buffers on the board side or you can do cross-talk studies with all 3 buffers driving (use custom stimulus to obtain odd and even cross-talk) and terminated into the approriate transmission lines (coupled or uncoupled as needed) with Rx buffers at the end of the lines.
Kai Keskinen
pramod_si
Posts: 8
Online: User is Offline
4/18/2007 11:05 AM  
Hi Keskinen
Thank you very much for ur response. I will do the simulations as u suggested.
Can I get ur email address pls?
Thanks
Pramod
Posting to forums is available to community members only.
Login or Register


ActiveForums 3.6
     
Copyright 2006 Cadence Design Systems, Inc.