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Forums > Silicon-package-board > Signal Integrity and Modeling

Subject: VRM and capacitor placement in Allegro PCB PI
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GinoChen
Posts: 1
Online: User is Offline
11/14/2005 11:46 PM  
In Allegro PCB PI, if there are many capacitors on the chosen power plane pair, it wastes time on placing the decoupling capacitors on the board in the post-simulation. Is there any way to auto-assign the capacitor to the actual placement on the board? Besides, only a VRM can be placed for a power plane pair, but if the actual VRM has multiple phases, how does the VRM be properly placed?
Juergen
Posts: 2
Online: User is Offline
11/29/2005 1:58 PM  
Auto-assigning PI models to capacitors used in a completed board is not supported. My recommendation is to use the Signal Model Assignment GUI to assign PI models to the capacitor types used in the design. In setup under Libray select only the capacitors from the board to be used. A small test case is attached you can explore and play with.

Not sure I fully understand your VRM question. If with multiple phases you refer to a time domain behavior, you would have to transform this into an equivalent description in the frequency domain and customize the VRM model accordingly.
Hope this helps. Juergen

Attachment: model_jf.zip
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Forums > Silicon-package-board > Signal Integrity and Modeling > VRM and capacitor placement in Allegro PCB PI


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