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Forums > Digital IC > Synthesis and test

Subject: Forwarding RTL pragmas to Encounter
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Stalker
Posts: 24
Online: User is Offline
8/20/2007 1:18 AM  
Hi All,
Synthesis pragmas are widely used in Verilog designs. One of them is "infer_mux" is used, when the designer wants to ensure, that the logic will be mapped to mux.
RTL - Compiler respects the pragmas and mappes the logic to mux. The problem is, that the information about the pragma dissapear at this this point. When FE optimizes the netlist, the mux is converted to equivalent logic.
How can I ensure, that the mux will stay mux during all flow?
There are to much infer_mux pragmas, to search the muxes manually and to apply "dont_touch" constraint.
Thank you in advance,
Maxim R.
sudhir.jain
Posts: 3
Online: User is Offline
8/20/2007 4:07 AM  
In RTL Compiler, you can get the list of such inferred muxes after generic synthesis. They would get mapped to the muxes and would have preserve size_delete_ok attribute.
You can put set_dont_touch on these muxes in FE so that they are not optimized.

Sudhir
Stalker
Posts: 24
Online: User is Offline
8/20/2007 4:11 AM  
Hi Sudhir,

How can I get the list of infered muxes?

Regards,
Maxim R.
sudhir.jain
Posts: 3
Online: User is Offline
8/20/2007 4:14 AM  
This should work. (after generic synthesis)

filter preserve size_delete_ok [find /designs/ -instance *]
Stalker
Posts: 24
Online: User is Offline
8/20/2007 4:15 AM  
I'll try.
Thanks a lot
Maxim R.
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Forums > Digital IC > Synthesis and test > Forwarding RTL pragmas to Encounter


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