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Forums > Digital IC > Synthesis and test

Subject: 2-dim. array of record-typed generics
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gus
Posts: 3
Online: User is Offline
9/25/2007 6:06 AM  
I have the following problem when synthesizing with RTL Compiler: I have a 2-dim. array of processing elements and each processing element gets its own set of generics. This generics are grouped into a VHDL record type. Now, I have a 2-dim. array of records as a generic variable. When instantiating the top level module, certain values are assigned to each record in the array. But in the elaborate phase, RTL Compiler sets all values in a record to zero. In my design this leads to an elaboration error, because the value zero is not allowed. How can this be avoided?
grasshopper
Posts: 48
Online: User is Offline
9/25/2007 7:42 AM  
Hi Gus,

can you share some sample RTL with us? I am not clear I understand the issue you point out and the code I had that I thought was similar seems to be working.

gh-
gus
Posts: 3
Online: User is Offline
9/25/2007 7:56 AM  
The code goes like this: < code > type t_pe_generics_record is record 1_first_var :positive range min_length to max_length; 2_second_var :integer range 0 to 63; .... 25_fifth_var :integer range 0 to 7; end record t_pe_generics_record; type t_pe_generics_array is array(integer range<>, integer range<>) of t_pe_generics_record; entity user_logic is generic ( ... PE_GENERICS :t_pe_generics_array(1 to 2, 1 to 2); ...); port(...); uut :user_logic generic map(... PE_GENERICS => (((25values),(25values)),((25values),(25values))), ...) port map(...); < code >
gus
Posts: 3
Online: User is Offline
9/25/2007 8:01 AM  
The code goes like this: 

type t_pe_generics_record is record
1_first_var :positive range min_length to max_length;
2_second_var :integer range 0 to 63;
....
25_fifth_var :integer range 0 to 7;
end record t_pe_generics_record;

type t_pe_generics_array is array(integer range<>, integer range<>)
of t_pe_generics_record;

entity user_logic is
generic
( ... PE_GENERICS :t_pe_generics_array(1 to 2, 1 to 2);
...);
port(...);

uut :user_logic
generic map(... PE_GENERICS => (((25values),(25values)),((25values),(25values))), ...)
port map(...);
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Forums > Digital IC > Synthesis and test > 2-dim. array of record-typed generics


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