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Subject: on Encounter RTL compiler
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cdnhua
Posts: 2
Online: User is Offline
4/12/2008 9:57 AM  
I have a few questions regarding using Encounter RTL compiler. First, is RTL compiler an equivalent of the Synopsys Desing Complier tool? Both Synthesize the RTL verilog code to a gate-level netlist? Second, as an user in academic institutions, we have downloaded technology packages from MOSIS and the one we are currently using ARM/Artisan library for IBM 0.13um technology. However, I am having trouble with RTL compiler with this library? Should I set "lib_search_path" to the directory where the standard cells are located? Also, I could not find a .lbr or .lib file from the ARM/Artisan library, so I do not know how to set "library"? Do I have to create that file myself? Does anyone have used MOSIS ARM/Artisan before? Your help is highly appreciated.
aravindhere
Posts: 3
Online: User is Offline
4/16/2008 12:00 AM  
Hi Friend,
RC is simillar to DC from SNPS. Please use write_template command in RC to generate an template rc script and read the user guide document for more information about commands.

Thanks
Aravind R
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Forums > Digital IC > Synthesis and test > on Encounter RTL compiler


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