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Naderi
Posts: 24
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| 5/02/2008 1:57 PM |
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hello
all,
i am using Cadence BuildGates tool to synthesis rtl for cmos90nm STM
technology. The logic is as big as half a million gates. My issue is the
BuildGates stops working after a few hours try with following error:
INTERNAL_ERROR: (mem_enomem2_from) - no memory available for allocation.
Exiting...
Is there any solution for this error?
I am using all memory
of a sun machine (SunOS merlin 5.8 Generic_117350-50 sun4u sparc
SUNW,Ultra-1000).
any idea is welcomed.
Thanks,
Ali
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grasshopper
Posts: 47
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| 5/02/2008 6:43 PM |
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Hi Ali,
sounds like you need to add more memory to your ol' sun machine
gh- |
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Naderi
Posts: 24
Online:
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| 5/16/2008 10:46 AM |
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Hi,
I am not sure, because the tool can always use virtual memory that is very large. I think, there should be an option for heirarchy synthesis, which uses memory more efficient.
Ali |
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