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Subject: TIP OF THE MONTH – Sept. 2007: Set-Up Automation
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vincep
Posts: 1
Online: User is Offline
9/07/2007 10:05 AM  
One requirement in running Equivalence Checking [EC] is to have a proper set-up. This is because, with an incomplete or incorrect set-up users would see false-negative EC result - in other words, non-equivalency and/or abort due to incorrect design/constraints set-up. Thus, users would need to spend some time to debug, understand the cause, and perhaps provide additional set-up if needed.

To prevent and resolve set-up related issues, Conformal EC XL 7.1 has a new algorithm targeted to analyze certain differences in structure and optimization between the Golden and then Revised designs, and then be able to identify what the set-up should be.
 

--------------------------------------------------------------------------------------

Syntax :

       SET ANalyze Option

       [-NOAUTO | -AUTO]

       (Setup Mode)

 

Description :

       Automatically determines the best place to run the ANALYZE SETUP com-

       mand. In addition, the Conformal software automatically runs the ANA-

       LYZE ABORT command whenever the comparison returns abort points but no

       non-equivalent points.   Note: This is a Conformal 7.1 XL command.

 

Parameters:

       -NOAUTO        Disables automatic analysis. This is the default.

       -AUTO          Enables automatic analysis.

 

Example:

// Command: set analyze option -auto

// Command: set system mode lec



// Running automatic setup...

// Remodeled 1 gated-clock DFF/DLAT(s)

// Automatic setup finished

 

In this example, command “set analyze option –auto” enables Conformal to automatically recognize that synthesis tool has performed clock-gating as part of power optimization process. Thus, it specifies Conformal to remodel the gated-clock structure, allowing a successful verification of RTL versus synthesized gate netlist.

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Notice that the tool infers the set-up based only on what is present in the 2 designs. No information is otherwise passed between implementation and verification of the implementation. This is very important to preserve our independent audit and ensure that your EC tool will not miss a common mode error, a critical Conformal philosophy since the beginning. A false-positive EC result - an equivalent result when it should not be - is obviously very undesirable.

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Forums > Digital IC > Formal verification > TIP OF THE MONTH – Sept. 2007: Set-Up Automation


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