Tuesday, January 06, 2009     Register | Login | Search | Contact Us
     
   
     
     

Many of you already received communications about the move of the Cadence user community into cadence.com. And many of you have already joined, with over 4000 registrations in the first two weeks.

The new Cadence Community enhances the ability of Cadence users to connect and collaborate. In addition to moving the community into cadence.com -- enabling single sign-on for community, Sourcelink and Cadence events -- the new site is organized around nine technology segments, giving you easy access to product information, training, forums and blogs. Some of the new features include:
  • Ability to respond to posts via e-mail
  • Technology-specific blogs
  • Latest Web 2.0 social networking capabilities
  • Public profile options
  • Private messaging
  • Friends lists
Visit the new Cadence Community today at www.cadence.com/community and join the discussions!

Registration note: Due to the scope of the enhancements and the new SSO registration system, we were not able to migrate existing cdnusers.org member accounts. So new registrations are required, but this enables a broader set of functionality we think you'll enjoy.

Forum note: Under the guidance of forum moderators, we have taken the 20+ cdnusers.org forums and consolidated them into 11 forums on the new site. Posts have been brought over so you can leverage that posting history. CDNusers forums will be set to read only starting 7/30, and cdnusers.org will be redirected to the new community on 8/4.

Best regards,
Mike and Tom

Michael A. Catrambone - Steering Committee Chairman
Distinguished Engineer
PCB/Mechanical
UTStarcom, Inc.

Tom Diederich
Cadence Community Manager
Home
Forums
Forums > Digital IC > Floorplanning, Place and route

Subject: Get Boundary Flops list ?
Posting to forums is available to community members only.
Login or Register
Rate this topic:
   
Author Messages
bougantp
Posts: 19
Online: User is Offline
6/05/2007 9:18 AM  
I am working on hierarchical design.
I want to do a hierarchical bottom up CTS.
At partition level, after CTS, I want to allign the external clocks (The clocks related to input/output delay) with my internal clock to continue the flow.
I need first to characterise my internal postCTS clock network latency.
I need to focus on my boundary flop, I am dealing with useful skew for internal flops...

How can I get this clock latency information only based on boundary flops ?

Is it possible to get the list of boundary flops ?

Any other ideas ?

Pat.
eminemshow
Posts: 75
Online: User is Offline
6/06/2007 2:29 AM  
Dear bougantp:

1. You can write a FE-TCL script to do this. 1st to get all the ports of your hierarchical block, the trace from this port & get all the registers, this is what you want!
2. You can report the in2reg & reg2out timing, then use some PERL or VI to achieve this. Seems not easy.

FYI
bougantp
Posts: 19
Online: User is Offline
6/06/2007 6:56 AM  
It is quiet easy to get the list of ports, but how can I do to get the associated flops ?
jaredlee
Posts: 1
Online: User is Offline
6/06/2007 8:30 AM  
If you use the timeDesign command it will create timing reports with in2reg and reg2out (Don't forget to set your -numpaths high enough). From there just grab the subsequent Endpoint and Beginning to get the register names. To get more expanded information use the report_timing command with the "-path_type full_clock" option to include the clock tree. You can also use report_timing to do the first step, depending on your block size, it may be faster to time each port individually and then grep the report.
bougantp
Posts: 19
Online: User is Offline
6/06/2007 9:14 AM  
Design size is quiet big : 1200Kinstances, and number of ports is in the range of 4K to 7K, so a script based on foreach port get report timing ... might be very long (?)..
eminemshow
Posts: 75
Online: User is Offline
6/06/2007 5:33 PM  
pls use dbForEachCellPort command to loop all the ports of your top cell, then get the port name and report timing according to the port directions, use report_timing -from or -to, then get all the FFs. Thre must be a ENDPOIT, I think this ENDPOINT is waht you want.
Thanls jaredlee, you give me a idea, easy than a full TCL code.
Posting to forums is available to community members only.
Login or Register
Forums > Digital IC > Floorplanning, Place and route > Get Boundary Flops list ?


ActiveForums 3.6
     
Copyright 2006 Cadence Design Systems, Inc.