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tzhou@micron.com
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6/11/2007 12:19 PM
When I P&R a huge block, there are situations that I need to place several physical IO pins for a single top level port/net, usually, on different sides of the block for the purpose of easing the higher level connection. FE looks like only understand one physical IO pin for each port/net and when I did trial route, I found only one physical pin per net(port) was hooked up. In this way, it coundn't estimate the real routing congestion through the whole block when I have hundreds of such kind cases of multiple IO pins (for each net/port). How can I let FE know that there are several physical IO pins for a signle port and therefore, it will connect all of them together when it route the block for me?

EngHan
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6/13/2007 11:06 PM
Hi Zhou, In a previous layout that I did, I could not create 2 pins for the same net with pad.io file (use with command " loadIOFile"). I have to use DEF to achieve this. Hope this info is helpful. Regards, Eng Han

tzhou@micron.com
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6/14/2007 9:30 AM
Hi, Eng, Thank you for your inform. I did the same procedure to load in multiple physical pin definition (in def, there are 'pin.extra*' for second pin or third pins). However, I couldn't figure out how to let FE really take into account those multiple pin definitions when it do the placement and route. No matter how many pins per net I provide it by DEF in, it only base on one pin location (?randomly picked from multiple locations) per net to carry out its congestion analysis (during placement) and trial route. Did I forget to setup some special variable? Thanks Tongju

lisiang
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6/20/2007 11:37 PM
Is that what you have in the def file? I assumed nanoroute is doing the right connection since you did not mention about nanoroute. If that is true, it must be a bug in the trialRoute. PINS 2 ; - a + NET a .... ; - a.extra1 + NET a ... ; li siang

tzhou@micron.com
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6/26/2007 11:28 AM
Hi, Li siang, Thank you for your message. Yes, I have similar syntax in my DEF file for those multiple pins. Actually, after I saved floorplan, I did see the expecting information in the IOPin section. For example, for the "a" pin, I will see two entries, something like: --- IOPin: a 0.0000 191.3 W 2 0.5000 0.5000 fixed 1 PinBox: 0.0000 191.3000 0.5000 191.8000 IOPin: a 111582.4000 191.3000 E 2 0.5000 0.5000 fixed 1 PinBox: 111582.4000 191.3000 111582.9000 191.8000 --- Also, I tried to do a save-def operation and the new DEF file do have the mutiple pins. So, those multiple pin information did get into the tool correctly. Both trialRoute and nanoRoute connect only one pin no matter how many pins given for a net. Actually, this is not what makes me worry most since I can def-out the placement and use other tool (such as ccar) to finish those multiple pins connection. What really irritated me is how to reserve reasonable/proper routing channel. Because FE will not take into account those connections, so, its congestion estimate/report always give me unrealistic better result, especially when those multiple pin number is huge. More importantly, the "Perform Congestion Optimization" option in the placement stage will not work correctly to produce a routable placement. So, if there is any variables that will turn on the "real" recognization of mutiple pins, it will help me a lot. Thanks Tongju

EngHan
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6/27/2007 2:58 AM
Hi Tongju, I load back my old database and I also noticed that trialRoute only connect to one of the pins (the nearest one to the standard cell). But nanoRoute connect it correctly to all the pins. Regards, Eng Han

mboudreaux
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2/05/2008 11:28 AM
I am running into this same issue... My incoming DEF has the syntax listed above, but I can't get FE to physically place the pin. Are there any new ideas to remedy this?

mboudreaux
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2/06/2008 2:35 PM
I can now get FE to place the pin.. The "square" shows up in the correct places. The "triangle" only shows up in the first port listed in the DEF. As such, nanoroute does not connect to the physical pin without the "triangle." How did you get nanoroute to do this? I am running FE 6.2 in 64bit linux.

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Forums > Digital IC > Floorplanning, Place and route > How to handle multiple physical IO pins for a single port?