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Forums > Digital IC > Floorplanning, Place and route

Subject: How to handle assign statements
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gukumar
Posts: 5
Online: User is Offline
7/26/2007 11:05 PM  
In our design, we have few signals which need to be tied to 1'b0, 1'b1, as shown below.

    assign z⎜] = 1'b0 ;
    assign port_compΎ] = 1'b1;

During PD, I want to tie these nets to VDD and GND nets. Can somebody help on how to do this?

Thanks in Advance,
Krishna
Stalker
Posts: 24
Online: User is Offline
7/27/2007 12:15 AM  
Try adding tie cells before writing verilog.
If you work with RTL - Compiler it looks like:
remove_assigns
insert_tiehilo_cells
Maxim R.
gukumar
Posts: 5
Online: User is Offline
7/27/2007 12:36 AM  
Hi Stalker,

The ASIC vendors that we are dealing with do not have TieHi/TieLo cells in their library. So we need to connect these nets directly to vdd/gnd. Is there a way to do this, either in SoCE or RTL-C.

Thanks;
Krishna
Stalker
Posts: 24
Online: User is Offline
7/27/2007 1:06 AM  
I never connected cells directly to the grid.
As far as I know LVS tools recognize 1'b0/1'b1 as vss/vdd
Maxim R.
gukumar
Posts: 5
Online: User is Offline
7/27/2007 1:08 AM  
so can we leave the nets floating. i thought there is a way to connect all 1'b0 to gnd and 1'b1 to vdd.
Kari
Posts: 81
Online: User is Offline
8/01/2007 10:39 AM  
Hi Krishna,

Make sure you have the following in your .conf file before loading the design: (NOTE this is an example; make sure to use your specific pwr/gnd net names and std cell pin names. These are usually VDD/VSS, but can be different.)

set rda_Input(ui_pg_connections) [list \
{PIN:VDD:} \
{PIN:VSS:} \
{TIEHI::} \
{TIELO::} \
]
set rda_Input(PIN:VDD:) {VDD}
set rda_Input(PIN:VSS:) {VSS}
set rda_Input(TIEHI::) {VDD}
set rda_Input(TIELO::) {VSS}

This should setup tiehi/lo nets and nanoroute should connect them.

Hope that helps,

- Kari
gukumar
Posts: 5
Online: User is Offline
8/01/2007 3:10 PM  
Thanks Kari. It worked.
Kari
Posts: 81
Online: User is Offline
8/06/2007 11:46 AM  
You're welcome, Krishna. I'm glad that worked for you.

- Kari
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Forums > Digital IC > Floorplanning, Place and route > How to handle assign statements


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