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Forums > Digital IC > Floorplanning, Place and route

Subject: connecting I/O pins together without inserting buffer
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houmanh
Posts: 21
Online: User is Offline
8/07/2007 11:01 AM  
Hi,

I have some I/O pins which are analogue and they must be connected together.(that's strange but this is what I have to do!!)
As in the verilog I use assignment stateent to connect these I/O pins together(assign output_pin_A = input_pin_B) , the RTL compiler insert buffer for them. I just wonder if there is anyway to connect them directly without inserting a buffer, (as they are analogue pins).
I guess that is something should be done during the routing stage, whether asking the nanroute to connect them using a feedthrough channel or something like this.

Thanks,

Houman
Kari
Posts: 81
Online: User is Offline
8/07/2007 1:21 PM  
Hi Houman,

If you don't want a net to get buffered in synthesis or in Encounter, then you need a set_dont_touch in the constraints for that net. Nanoroute should have no problem routing this connection, but you mention feedthroughs, so I may not fully understand your design hierarchy.

- Kari
houmanh
Posts: 21
Online: User is Offline
8/07/2007 3:51 PM  
Hi Kari,

Thanks so much, that worked.  I was spending a couple hours and couldn't figure out how to do this until I got your message.

Regards,

Houman
lisiang
Moderator
Posts: 48
Online: User is Offline
8/08/2007 7:17 AM  
connect the 2 io pins without a buffer might cause lvs failure (2 pin texts on the same net).

li siang
Kari
Posts: 81
Online: User is Offline
8/08/2007 10:34 AM  
Hi Houman,

I'm so glad that helped you!

I'm not an LVS expert, so you may want to check what Li Siang mentions. But if the netlist has these pins connected, and the layout follows, I don't think it should be a problem. (Maybe a warning about stamping conflicts, etc.) The only way to be sure is to run LVS.

- Kari
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Forums > Digital IC > Floorplanning, Place and route > connecting I/O pins together without inserting buffer


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