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Forums > Digital IC > Floorplanning, Place and route

Subject: Metal density/ Density check
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mahecadence
Posts: 19
Online: User is Offline
11/27/2007 12:15 AM  
Hi All,

Please can anybody give me the information about Metal density/ Density check.

Thanks in advance.
ssunder@sioptical.com
Posts: 24
Online: User is Offline
11/30/2007 8:57 AM  
Hi -

What are you looking for ? The question is very generic and is technology dependent.

Density requirements and checks are becoming more tedious with the smaller technolgies.

Step 1 - Add Metal Fill. Use the addMetalFill command.
addMetalFill -layer {METAL LAYERS} {AREA TO INSERT FILL} -timingaware on

Be aware of active spacing etc.

Parameters to fill this can be set using -
setMetalFill

Check timing , trim metal if required.

Step 2 -
I have used the ADDFILL command to insert the standard cell FILL cells. I do it in two steps because it inserts too many instances of the smaller FILL cells. So do the bigger ones first and the smaller cells.

ADDFILL -prefix {PREFIX} {LIST OF FILLER CELLS}

Step 3 - verifyMetalDensity -layers {METAL LAYERS} -area {AREA to be verified}

Our final checks are done outside in another tool.

Dont know if this helps.

Sanjay Sunder
mahecadence
Posts: 19
Online: User is Offline
12/10/2007 12:55 AM  
Hi ssundar,

Thanks for giving me this information.

But i want to know more about practical examples about metal density.Please can you help me in this.
pjayasekharan
Posts: 10
Online: User is Offline
12/11/2007 8:26 AM  
hi metal density is just a check to make sure there is uniform density across the chip for manufacturing reasons. In FE you can add metal for each layer. First you setup some parameters like fill density, fill spacing between active layers etc. Then you run addmetalfill command. This should be the last step in the flow because modifying it is not easy. generally we try to meet around 30% coverage for each layer. Since FE does not account for analog blocks, we will go with even less than 30% in FE. -p
ssunder@sioptical.com
Posts: 24
Online: User is Offline
12/12/2007 8:46 AM  
Hi -

You would really have to go by the DRC rules for your technology. As an example we set min density of  45% and max density of 70%. We came up with these numbers after going through the density requirements in our DRC rules.

setMetalFill -layer { 1 2 3 4 5 6 } -maxLength 4.0 -minLength 0.6 -maxWidth 1.2 -minWidth 0.6 -decrement 0.2 -activeSpacing 0.8 -gapSpacing 0.25 -windowSize 50 50 -windowStep 25 25 -minDensity 20 -maxDensity 70 -preferredDensity 45

addMetalFill -layer { 1 2 3 4 5 6 } -timingAware on -area

You could use this as a start point and try experimenting.

Sanjay
mahecadence
Posts: 19
Online: User is Offline
1/10/2008 4:33 AM  
Hi ssundar,

Thanks for giving information about density check. In addition i want to know about spare cells along with decap cells.
ssunder@sioptical.com
Posts: 24
Online: User is Offline
1/10/2008 6:34 AM  
There are two commands that you can use for spare cells. You can define your own spare cell module using the command
createSpareModule -modulename MY_SPARE -cell {list of gates separated by spaces} -tie {TIEHI or TIELO}

In the list of cells be sure to include flops, CTS cells etc. whatever you may feel is important.

You can automate the placement of the spare cells using the command
placeSpareModule -modulename MY_SPARE -util <> -stepx <> -stepy <> -offsetx <> -offset y

Run these two immediately after loading the floorplan. Rest of the flow should remain as such.

For decap cells use the AddFiller command. You can specify the list of decap cells that you want the tool to add.

addFiller -prefix <> -cell {list of decap cells}

You can run this command after postRouteHoldOpt.

Regards,
bougantp
Posts: 19
Online: User is Offline
1/10/2008 6:57 AM  
I see also that CTS is able to add automatically spare flop during ckSynthesis.
You just have to add specific directive in the clock tree spec file.

It could be intersting because your spare flops are ready to use (Already connected on the clock network, and so balanced).

Is somebody has some experiment on that feature ?

Pat.
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Forums > Digital IC > Floorplanning, Place and route > Metal density/ Density check


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