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Subject: Running Voltagestorm from Encounter
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denil
Posts: 7
Online: User is Offline
6/11/2008 12:22 AM  
Dear all,

I am trying to start Voltagestorm from within Encounter, for a 9 layer TSMC 65GP power gated design, but got stuck in the runLibGen process.

Here is what I did:
- From within the Encounter GUI, I selected Power -> Analysis -> Run Voltagestorm
- This requires a library, which can be generated by clicking on Genlib
- In this window, I select as input type "LED&GDS", fill in the 3 LEF and GDS files for standard cells, mtcmos cells and memory
- I create a layer mapping file including:
    o LEF/DEF layermap (metal metal1 lefdef M1, etc)
    o GDS2 layermap (metal M1 gds 31 0, etc)
    o In this file I also set DEF_MBB to the boundry box layer ( layer DEF_MBB gds 108)
- For technology file I selected the rcworst techfile from T-N65-CL-SP-036-V5_11a (rcgenTechFile)

When I then click on ok I get the following error:

  LibGen - Cell Library Preprocessor - Version 6.2.0c (02/09/2007)
--------------------------------------------------------------------
          Copyright (c) 2007 Cadence Design Systems, Inc.


Executing 32 bit version on host uxapp1nl.

Starting at 2008-Jun-10 13:39:56 (2008-Jun-10 11:39:56 GMT).

Error:
The name of the XTC command file has not been specified. Use
"gds_extractor_command_file" variable to specify it.

Session cannot continue due to errors while processing command file.

Ending at 2008-Jun-10 13:39:56 (2008-Jun-10 11:39:56 GMT).
  Run duration:          00:00:00 CPU time, 00:00:00 clock time

  Warning messages:      0
  Error messages:        1
  Fatal error messages:  0

Exit code 2.
LibGen exited unsuccessfully.
"libgen" failed to finish successfully.


I found in the manual that I can set gds_extractor_command_file in the layer mapping file, but I have no idea where to find this file. Do you know if this is a file which is genarally supplied with the libraries, should it be generated by Encounter, or should this be written by the designer?

Thanks!

lisiang
Moderator
Posts: 48
Online: User is Offline
6/13/2008 12:58 AM  
if the libgen looked for that file (gds_extractor_command_file), it is trying to generate a detail power view. Look for any option to generate "port view" only then you can skip that file. If you need to generate the detail view, your Cadence AE should be able to find you a copy of the gds_extarctor_command file for the TSMC65LP process (it is related to the LVS file).

li siang
denil
Posts: 7
Online: User is Offline
6/16/2008 8:03 AM  
Thanks for the info!
Do you know if there is any other way to get these files? (TSMC?)
As we are using Cadence through the academic program, we do not get support :-(.
My design is TSMC65GP, with Artisan standard cells and memories.
johariph
Posts: 6
Online: User is Offline
6/26/2008 8:48 PM  

you can write xtc command file yourself. GO through the Cadence 
libgen documentation for an example xtc command file. 

XTC is used to extract the devices like PFET, NFET, NWELL 
etc from GDS (its a gds extractor). The XTC command file contains
necessary logical operations on layers to create these devices. 
for ex: intersecting layers poly and ndiffusion creates a N-SOURCE
and N-DRAIN. 

The layer names, you use, in xtc command file to create devices must correspond to appropriate layer numbers defined in GDS. For
this, you need to define layermapping file, which maps layer 
name to layer number. 

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