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Subject: mask to mask DRC (stacked blind vias)
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msalberg
Posts: 10
Online: User is Offline
4/18/2006 2:32 AM  
 Hello all,
In Allegro V.15.1, I have a top thru layer 8 blind via and layer 13 thru 20 blind via stacked over one another.
I also have Soldermask to soldermask spacing set in Constraint / Design Constraint set to 4 mil spacing.
No bottom mask set in top blind via and visa-versa.

PROBLEM: I am getting a DRC (M/M) from top blind mask to bottom blind mask.
 But not in top / bottom smt parts on top of one another.

Any sugestions?

Thanks,
Mark
martoon
Posts: 0
Online: User is Offline
4/19/2006 5:46 AM  
there has been a service request submitted 33054124 which identifies the problem and requests a fix. Cadence has apparently fixed this, but it has yet to be implemented
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Forums > Silicon-package-board > PCB Design > mask to mask DRC (stacked blind vias)


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