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Forums > Silicon-package-board > PCB Design

Subject: Thieving Process
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Rajiv
Posts: 21
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2/27/2007 1:07 AM  
Can anyone please tell what's the thieving process & how it can be useful in the design ?
Regards!!
Rajiv Vig
Mando Softtech India
Rajiv
Posts: 21
Online: User is Offline
2/27/2007 1:07 AM  
Can anyone please tell what's the thieving process & how it can be useful in the design ?
Regards!!
Rajiv Vig
Mando Softtech India
kp
Posts: 53
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2/27/2007 2:29 AM  
The thieving process is the adding a copper pattern to the plated layers of a board. Balanced copper helps to ensure even plating and etching especially important for this isolated traces.

KP
kingshar
Posts: 33
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6/11/2007 10:41 PM  
KP can you please explain it with an example

Regards,
SK
satya1234
Posts: 0
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6/12/2007 12:23 AM  
       Addition of small copper squares to pcb in bare areas to even out the electroplating.


  Be very carefull of letting your fab house add copper thieving to your signal layers. If your board is a high speed design the answer would be no. Thieving can contribute to EMI problems. It would be much better for you to back and add copper pours to these areas and tie them to ground than to let your fab house arbitrarily add floating thieving where they want to, unless they plan on removing it later. If they are asking you if they can add it then I don't believe that they plan on removing it, which would be extra steps and extra cost. If you are unsure talk to your engineers before allowing this.

Regards,
SATYA
AT&S Ecad .
kingshar
Posts: 33
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6/12/2007 1:36 AM  
thanku you satya


Regards,
Sarath Kumar B
kingshar
Posts: 33
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6/12/2007 1:37 AM  
Thank you Satya



Regards,
Sarath Kumar
JBratton
Posts: 0
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6/12/2007 4:41 AM  
The problem with adding GND floods in open areas is that it changes the impedance of traces on an adjacent wiring layer. If you don't care about controlling the impedance, that's a viable option.
eswar
Posts: 0
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6/12/2007 5:00 AM  
Yes its true to some extend. If the design contains impedence signals this issue can be avoided while building the stackup.
if a stackup built with proper reference planes it would not make any difference in the imedence. In case of dual strip line it may affect but as we always have some toleren it should take care of this issue.
jcteyssier
Posts: 0
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6/12/2007 10:28 AM  
Be carrefull with letting fab house add coppers: they can't know coppers keepout and have no dielectric notion with gerbers.
Image coppers added in high voltage area...
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Forums > Silicon-package-board > PCB Design > Thieving Process


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