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girish_mn Posts: 10 Online:
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| 5/07/2008 11:35 PM |
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| Please any one help me how to create via stack up (one of my customer asking screen shot of via stack up ) , & is there any command to Drop/delete Unused pads in Via in the Allegro PCB Design L 16.0Version.
Regards,
Girish_mn
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mcatramb91 Posts: 137 Online:
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| 5/08/2008 8:16 AM |
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| You can suppress unused pads by selecting the option for each artwork film record. (Manufacture > Artwork) You will not see the pad suppressed on the screen but the output will have them suppressed if they are not connected. Remember you will need a pad present on the start and stop layers to ensure the hole is plated properly during fabrication. If there are certain padstacks that required a pad on every layer whether they are used or not you will need to select Fixed under the Internal layers section of the individual padstack. See attached images.
Hope this helps,
Mike Catrambone
UTStarcom, Inc.
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girish_mn Posts: 10 Online:
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| 5/09/2008 2:51 AM |
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| Hi Mike,
Thanks for your clear description.
Any care to explain what is the use of suppresing or dropping via pads in unused layer ,this will vary the via diameter, is this effects on the current carrrying capacity of via? & impidence of the board?, and one more confusion; I found flash in via in some board ,is this necessary (i hope flash is needed only when solder joint will come ,but if flash not defined warning will come in the artwok report)
Regards,
Girish Kumar
INDIA |

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mcatramb91 Posts: 137 Online:
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| 5/09/2008 11:08 AM |
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I am not sure why you have "Film Parameters" section twice under SIG8.art processing section but I will ignore that for now.
The warning about the layer polarity should be addressed. Your Film Record plot mode should match the cross section layer type. If SIG8 layer contains traces you would want to set the Film Record plot mode and Cross Section layer type both to Negative.
As far as the missing thermal flash; you will need a thermal flash defined in the listed padstacks in your report so Allegro knows what is to be flashes at the location when the via is connected to the plane and if not it will not be connected because the regular pad is used.
On Negative planes, selecting the "Suppress Unconnected Pads" option in the film record has no effect with the output because pads will not present just openings in the copper plane. At the locations where a pin or via is connected to the plane a thermal flash is output driven by the padstack definition. If you are using RS274X then you must have a flash symbol (.ssm) created for each of the thermal flash definitions matching the flash names inside your padstack.
Hopefully I did not lose you with this, but you must be carefully when using negative planes and flashes because it is very easy to get into trouble and generate an unexpected gerber file output.
Hope this helps, Mike Catrambone UTStarcom, Inc. |
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girish_mn Posts: 10 Online:
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| 5/10/2008 1:22 AM |
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| Thank you very much Mike for sharing valuable tips one line solved the following doubts (Film Record plot mode and Cross Section layer type both to Negative)
Cross section menu in Allegro16.0 version is entirely different from 15.7ver, while upgraded to 16.0version , not identified this option(negative art wotk markig) , so in the plane antipad is not working , whtever the constraint we will set that is effecting , but we selected the negative type option in the Film Record plot mode ,did this for 2-3 boards ,but we are not received any complaint from manufacturer.
could you please help me whether the flash size should be equal to the regular pad f via or more than that ?
Regards,
Girish
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Attachment: Image.PDF
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mcatramb91 Posts: 137 Online:
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| 5/12/2008 4:01 PM |
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Just to correct my previous statement: If SIG8 layer contains traces you would NOT want to set the Film Record plot mode and Cross Section layer type to Negative. Sorry about the mis-type.
As far as the flash size - let me clarify what the thermal flash is used for on negative planes : Basically, the thermal flash is used when a via or pin is connected to a negative plane.
In the case of vias the thermal flash would simple be a pad which is smaller the drill size so it gets drilled away which in-turn makes a direct connection to the plane, when required.
In the case of pins the thermal flash is a little more important because you would actually have a component pin installed into the plated thru hole then soldered into the PCB. If you don't have a thermal flash, also know as a thermal relief, then you may have difficulty during assembly or when attempt to remove the component from the PCB because all of the heat generated to flow the solder would be absorbed into the plane and you may not be able to remove the part without damaging the PCB.
Most of the industry uses a thermal relief at all locations where a thru hole component is soldered into the PCB and the only exception would be if the thru hole component has press fit pins that are pressed into the PCB without the use solder. The actually size of the thermal flash is normally driven by the thru hole size and here is a widely used formula to calculate the thermal flash: --> DRILL SIZE + .020" = INSIDE DIAMETER OF THERMAL --> DRILL SIZE + .040" = OUTSIDE DIAMETER OF THERMAL --> SPOKES = 4 x 45 Degrees x .015" Width. (The width of the spokes should be large enough to carry the required current and may need to be larger depending on the type of component you are using)
The resulting flash would be like a wheel broken into 4 pieces. The best way to illustrate this is to open up Allegro and start a new Flash Drawing using File > New then select Flash symbol from the drawing type list and enter a name in the Drawing Name fillin. Once you are in the Allegro Flash editor (symbol editor) you can generate a thermal flash by using Add > Flash then enter the Inside and Outside Diameter of the thermal flash as well as the spoke definitions and once you click the OK button it will generate a thermal flash. It will add the thermal flash at 0,0 so make sure you have an offset 0,0 to the middle of the drawing otherwise the flash generation will fail. The Flash Symbol name needs to match the Thermal Flash name defined in the padstack so it is used during output and you will no longer receive the warnings of the thermal flash missing.
Hope this helps, Mike Catrambone UTStarcom, Inc.
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girish_mn Posts: 10 Online:
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| 5/12/2008 9:09 PM |
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| Thank you very much Mike for spending your valuable time in giving guidline this will help me more.
Regards
Girishkumar
INDIA,Bangalore |
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