Wednesday, February 08, 2012     Register | Login | Search | Contact Us
     
   
     
     

Many of you already received communications about the move of the Cadence user community into cadence.com. And many of you have already joined, with over 4000 registrations in the first two weeks.

The new Cadence Community enhances the ability of Cadence users to connect and collaborate. In addition to moving the community into cadence.com -- enabling single sign-on for community, Sourcelink and Cadence events -- the new site is organized around nine technology segments, giving you easy access to product information, training, forums and blogs. Some of the new features include:
  • Ability to respond to posts via e-mail
  • Technology-specific blogs
  • Latest Web 2.0 social networking capabilities
  • Public profile options
  • Private messaging
  • Friends lists
Visit the new Cadence Community today at www.cadence.com/community and join the discussions!

Registration note: Due to the scope of the enhancements and the new SSO registration system, we were not able to migrate existing cdnusers.org member accounts. So new registrations are required, but this enables a broader set of functionality we think you'll enjoy.

Forum note: Under the guidance of forum moderators, we have taken the 20+ cdnusers.org forums and consolidated them into 11 forums on the new site. Posts have been brought over so you can leverage that posting history. CDNusers forums will be set to read only starting 7/30, and cdnusers.org will be redirected to the new community on 8/4.

Best regards,
Mike and Tom

Michael A. Catrambone - Steering Committee Chairman
Distinguished Engineer
PCB/Mechanical
UTStarcom, Inc.

Tom Diederich
Cadence Community Manager
Home
Forums
Forums > Custom IC > Custom IC Electrical Design

Subject: Tip of the Week: Clean up your FFT simulations
Posting to forums is available to community members only.
Login or Register
Rate this topic:
   
Author Messages
Hugh
Posts: 25
Online: User is Offline
9/25/2007 11:15 AM  
When doing FFT simulations, as with any sampled-data type of situation, frequency components that appear beyond the Nyquist rate (half the effective "sampling rate" of your FFT) are aliased (folded) back down into the Nyquist bandwidth.  For waveforms that have a large number of higher-frequency harmonics, this can result in a confusing array of spurs to have to sort through, many of which may have originated beyond the frequency range that you care about.  

This can be easily remedied by including a simple antialias filter on the output of your signal of interest.  Instead of plotting your circuit output directly, plot the output of the antialias filter.  The attachment to this email shows a plot of the spurs cleanup I got from using the filter in a simulation.  

Note, you should ideally set the break frequency of your filter at least a decade below the effective Nyquist frequency of your FFT, which will guarantee that all alias components are attenuated by at least 40dB (assuming a 2-pole filter is used).  To figure out your Nyquist frequency, take the inverse of your sample spacing and divide by two.  Or, just look at your DFT spectrum; the spectrum always ends at the Nyquist frequency.  (User beware!  Do not set the corner so low as to attenuate signals that you really do care about!)

The "Scalable ideal 2-pole RLC filter" that has been described in a different "Tip of the Week" posted to this forum can be used to do the spectrum cleanup.

Another way to reduce aliasing is to increase the sample rate (i.e. by increasing the number of DFT samples taken over the same sample interval), which extends the Nyquist frequency further out, reducing the number of spurs that are aliased.  This produces a proportionately larger data set, however. 

- Hugh





Posting to forums is available to community members only.
Login or Register
Forums > Custom IC > Custom IC Electrical Design > Tip of the Week: Clean up your FFT simulations


ActiveForums 3.6
     
Copyright 2006 Cadence Design Systems, Inc.