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Subject: Complete Simulation Run when Assertion fails
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ramesh_pal_yadav
Posts: 13
Online: User is Offline
11/22/2007 10:06 PM  
hi Cdnusers,

      I am writing SV assertions and using  IUS 5.8 simulator, While running the SV assertions if an assertion fails the simulation is getting Stopped.
     I wrote 10 assertions and  simulator run is getting stopped if a 4th assertions failing on some Error injection but i want to check the allied assertion failures for the  6th and 7th assertion also.
 
     Please suggest me a way to continue Simulation run when assertion fails and get a list of all Assertion failures.
jmueller
Posts: 14
Online: User is Offline
11/23/2007 12:43 AM  
Hi Ramesh,

you need the following command:

assert_stop_level never

See also http://sourcelink.cadence.com/docs/files/Release_Info/Docs/ncvlog/ncvlog6.2/debugging.html#1028139

Regards,
Joerg.
ramesh_pal_yadav
Posts: 13
Online: User is Offline
3/07/2008 9:47 PM  
Hi Jeorg,
Now i am working with IES 6.2 where i am usinf "irun" command for compilation,elaboration and simulation. Here i couldnt find any support for "assert_stop_level".I am getting an Error as
 irun: *E,BDOPT: Unknown option -assert_stop_level.

Is there any other way that i can Make my Assertion Errors covert into Warnings to Enable Complete Simulation Run ??

Thanks and regards,
RP Yadav

ajeetha
Posts: 97
Online: User is Offline
3/09/2008 10:14 PM  
Hi RP Yadav,
The assert_stop_level is a TCL command to ncsim. Though I've not tried it inside irun, I believe irun would accept some form of a runtime TCL/DO file similar to:

ncsim top -input cmd.tcl


That should work for you. Else there used to be a variable NCSIMARGS in hdl.var that you can set - but that's round about a way.

HTH
Ajeetha, CVC
www.noveldv.com
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Forums > Functional Verification > Assertion-Based Verification and Formal Analysis > Complete Simulation Run when Assertion fails


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