Thursday, September 09, 2010     Register | Login | Search | Contact Us
     
   
     
     

Many of you already received communications about the move of the Cadence user community into cadence.com. And many of you have already joined, with over 4000 registrations in the first two weeks.

The new Cadence Community enhances the ability of Cadence users to connect and collaborate. In addition to moving the community into cadence.com -- enabling single sign-on for community, Sourcelink and Cadence events -- the new site is organized around nine technology segments, giving you easy access to product information, training, forums and blogs. Some of the new features include:
  • Ability to respond to posts via e-mail
  • Technology-specific blogs
  • Latest Web 2.0 social networking capabilities
  • Public profile options
  • Private messaging
  • Friends lists
Visit the new Cadence Community today at www.cadence.com/community and join the discussions!

Registration note: Due to the scope of the enhancements and the new SSO registration system, we were not able to migrate existing cdnusers.org member accounts. So new registrations are required, but this enables a broader set of functionality we think you'll enjoy.

Forum note: Under the guidance of forum moderators, we have taken the 20+ cdnusers.org forums and consolidated them into 11 forums on the new site. Posts have been brought over so you can leverage that posting history. CDNusers forums will be set to read only starting 7/30, and cdnusers.org will be redirected to the new community on 8/4.

Best regards,
Mike and Tom

Michael A. Catrambone - Steering Committee Chairman
Distinguished Engineer
PCB/Mechanical
UTStarcom, Inc.

Tom Diederich
Cadence Community Manager
Home
Forums
Forums > Functional Verification > Assertion-Based Verification and Formal Analysis

Subject: Using the Forum
Posting to forums is available to community members only.
Login or Register
Rate this topic:
   
Author Messages
Moderator
Posts: 94
Online: User is Offline
1/20/2006 1:13 PM  
Welcome to the Verification Formal Analysis forum; a place to keep your finger on the pulse of the latest software developments and happenings in the areas you care about most. Get to know the experts, both inside Cadence and in our worldwide Verification user community. Ask your questions, get answers, and share best practices. Tell us what's on your mind...other users want to know what you think.

This forum is not intended to be a substitute for Cadence customer support and/or documentation, but we do believe that it will be helpful and a way to tap into vast knowledge that exists in our user community. Of course, any software support, documentation and installation issues should also be directed to your preferred Cadence support channels.

File attachments must use one of the following file extensions:.doc, .pdf, .html .zip, .il,.jpg,and .gif. Size limit on the attachments is 750KB. If you have questions or need help with attachments, send an email to community_moderator@cndusers.org

Administrator, cdnusers.org
hubertx
Posts: 0
Online: User is Offline
2/07/2007 10:01 AM  
Can I force or probe a signal in vhdl module from verilog top testbench?
I heard some simulator has its own way to do that easily, can you give me a example code to do that with ncsim?
foster
Posts: 0
Online: User is Offline
2/08/2007 12:08 AM  
Hi
foster
Posts: 0
Online: User is Offline
2/08/2007 12:09 AM  
Hi Hubert X,

I will reply to this question in a separate Thread, since this is the wrong thread.

F.
trapper
Posts: 1
Online: User is Offline
2/16/2007 11:01 AM  
I have a problem in taking the ratio of two node voltages (v(1)/v(2)) in AC Analysis(sweep). Using ABM2(VALUE),yield results which are too large(1e30). Obviously I'm doing something wrong. Any help in the form of comments, papers,or books would be appreciated.
Administrator
Posts: 157
Online: User is Offline
2/20/2007 5:05 PM  
Trapper,

this is not the appropriate forum for your question and since it is not a new thread, I cannot move it to the correct forum.

If this question refers to AMS, please re-post your question on the Custom IC Electrical Design forum.

If this is a Verification simulation question, please re-post to the Verification forum, Simulation, Acceleration, Emulation.

Administrator
Posting to forums is available to community members only.
Login or Register


ActiveForums 3.6
     
Copyright 2006 Cadence Design Systems, Inc.