Friday, November 21, 2008     Register | Login | Search | Contact Us
     

Many of you already received communications about the move of the Cadence user community into cadence.com. And many of you have already joined, with over 4000 registrations in the first two weeks.

The new Cadence Community enhances the ability of Cadence users to connect and collaborate. In addition to moving the community into cadence.com -- enabling single sign-on for community, Sourcelink and Cadence events -- the new site is organized around nine technology segments, giving you easy access to product information, training, forums and blogs. Some of the new features include:
  • Ability to respond to posts via e-mail
  • Technology-specific blogs
  • Latest Web 2.0 social networking capabilities
  • Public profile options
  • Private messaging
  • Friends lists
Visit the new Cadence Community today at www.cadence.com/community and join the discussions!

Registration note: Due to the scope of the enhancements and the new SSO registration system, we were not able to migrate existing cdnusers.org member accounts. So new registrations are required, but this enables a broader set of functionality we think you'll enjoy.

Forum note: Under the guidance of forum moderators, we have taken the 20+ cdnusers.org forums and consolidated them into 11 forums on the new site. Posts have been brought over so you can leverage that posting history. CDNusers forums will be set to read only starting 7/30, and cdnusers.org will be redirected to the new community on 8/4.

Best regards,
Mike and Tom

Michael A. Catrambone - Steering Committee Chairman
Distinguished Engineer
PCB/Mechanical
UTStarcom, Inc.

Tom Diederich
Cadence Community Manager
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Page 8 of 11 << < 234567891011 > >>
Topics Started By Replies Views Last Post
About URM library
davyzhu 2 2513
by davyzhu
4/24/2007 10:00 PM
C++ code through DPI?
davyzhu 2 1970
by davyzhu
4/24/2007 2:01 AM
SC-SV-Verilog interface
dvp 0 2007
4/23/2007 9:08 PM
SC and SV co-simulation in IUS?
davyzhu 3 2680
by jlrose
4/23/2007 12:49 PM
Reg : problem with reg declaration in IUS58
mssajwan 4 2491
by mssajwan
4/23/2007 7:06 AM
printf in IUS6.01
dfechser 6 2185
by tmackett
4/19/2007 12:04 PM
Please update IPCM website
davyzhu 2 1968
by davyzhu
4/19/2007 3:35 AM
BFM written in class has to interface with phy signals
chaitu2k 16 2520
by adielkhan
4/19/2007 2:52 AM
IFV and IUS, what's the difference?
davyzhu 6 2541
by davyzhu
4/16/2007 7:00 PM
file I/O
chaitu2k 1 2537
by ajeetha
4/16/2007 10:44 AM
generic task for hdl node force/release in system verilog
unmesh 1 2490
by ajeetha
4/16/2007 10:41 AM
waveform dump problem using SystemVerilog
ravurig 6 3199
by ajeetha
4/05/2007 8:22 AM
Wand Wires to be driven by Program Block and Module block
mayank 8 2676
by TAM
4/02/2007 7:18 AM
Replication Patterns
dfechser 6 2513
by Jim McGrath
3/29/2007 1:24 PM
problem:: Functional coverage analysis
vrkumar 1 2574
by vrkumar
3/27/2007 10:28 PM
vhdl & system verilog
indeb 10 2836
by indeb
3/26/2007 11:15 PM
Verilog/SystemVerilog mixing ncsim Fatal error?
davyzhu 3 2476
by davyzhu
3/19/2007 11:42 PM
ENUM Types for StateMachines
bryan 6 2597
by bryan
3/18/2007 12:50 PM
interface for bidirectional pins
chaitu2k 1 2468
by kameade
3/17/2007 2:52 PM
Hierarchical reference not allowed from within a package.
mayank 5 2826
by kameade
3/16/2007 10:44 AM
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Page 8 of 11 << < 234567891011 > >>




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