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Subject: Manipulating Packed Arrays (structures) using DPI
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tmackett
Posts: 34
Online: User is Offline
2/05/2007 2:51 PM  

I'm sharing this code which is a demo of how to manipulate a SystemVerilog Packed Array (SV data structure) using DPI. Unpacked refers to anything on the left side of an array.

logic Ε:0] my_array 󞚯:0]
        |-- packed      |-- unpacked

This code will work with IUS5.83.

----file: top.v------------
module top ();

// import functions do a call from SV to C
import "DPI-C" context addone_c= function int addone_sv(input int x);
import "DPI-C" context function void show_vec_inC(input bit ⎫:0] some_vec);
import "DPI-C" context function void show_logic_inC(input logic ⎫:0] some_vec);

typedef struct packed {
  int a;
  bit Η:0] b;
  bit Γ:0] c;
  } mydata_struct_s;
import "DPI-C" context function void pass_struct(inout mydata_struct_s t );

bit   ⎫:0] some_vec   = 32'h12345678;
logic ⎫:0] some_logic = 32'h8765X32Z;

mydata_struct_s mydata_struct_i;   

initial
begin
 $display("Gimme_Int %d",addone_sv(5));
 show_vec_inC(some_vec);  // pass reference per SV spec
 show_logic_inC(some_logic);  // pass reference per SV spec

 // stuff the structure with data
  mydata_struct_i.a = 9;
  mydata_struct_i.b = 10'b10_1011_0110;
  mydata_struct_i.c = 6'b11_0101;
  
pass_struct(mydata_struct_i);  // pass reference to packed struct

 $display("Verilog a %d",  mydata_struct_i.a);
 $display("Verilog b %h",  mydata_struct_i.b);
 $display("Verilog c %h",  mydata_struct_i.c);
   
end

endmodule

--------file: mydpi.c----------------
#include <stdio.h>
#include <svdpi.h>

// Copyright Cadence Design Systems, Todd Mackett 2007

// This is an example of manipulating packed data structure in SystemVerilog
// Use <install>/tools/inca/include/svdpi.h as a reference
 
int addone_c(int x) {
  return  x +1;
}

void show_vec_inC(svBitVecVal* x) {
   io_printf("show_vec_inC\n");
   io_printf("a= %x\n", *x);
}

// svLogicVecVal can have 0,1,X,Z
void show_logic_inC(svLogicVecVal* x) {
   io_printf("show_Logic_inC\n");
   io_printf("a= %x\n", *x);
   io_printf("aval %x\n", x->a);  // identical to aval bval as in PLI
   io_printf("bval %x\n", x->b);
}

// use VPI io_printf() instead of printf() to go to ncsim.log file

void pass_struct( svBitVecVal* x) {  // NOT const so that this can be modified
  // can use xΎ] to reference raw array
  // io_printf("Struct = %x, %x\n", xΎ], xΏ] );
  svBitVecVal aa;   // define a local svBitVecVal 
  // extract field a of SV "struct packed {...} mydata_struct_s

  svGetPartselBit(&aa , x, 16, 32);  // corresponds to mydata_struct.a
  io_printf("mydata_struct_s.a: %x \n", aa);
  
  svGetPartselBit(&aa , x, 6, 10);  // corresponds to mydata_struct.b
  io_printf("mydata_struct_s.b: %x \n", aa);

  svGetPartselBit(&aa , x, 0, 6);  // corresponds to mydata_struct.c
  io_printf("mydata_struct_s.c: %x \n", aa);
 
  io_printf("AA %x \n", aa);
  // do some manipulation on the local svBitVecVal
  aa = ~aa;  // invert the bits (some generic bit manipulation routine)

  // can do something like this too: just set the value of Verilog Structure
  // aa = 13; 
  io_printf("AA %x \n", aa);
 
  svPutPartselBit(x, aa, 0, 6);  // this will modify the Verilog structure 
 
}

-----file: RUN_NC (script)-----
rm -r INCA_libs
rm *.so
rm *.log
rm *.h

# Create .h file for Exported tasks/functions only 
# (imported function do NOT need .h file):
ncverilog +sv top.v +ncdpiheader+dpi.h +elaborate +ncelabargs+-messages

# ncvlog -sv top.v -mess
# ncelab top -sv  -dpiheader dpi.h -mess

gcc -fPIC -shared -o mydpi.so  mydpi.c  -I/`ncroot`/tools/inca/include

ncverilog +sv top.v +sv_lib=mydpi.so  +ncsimargs+"-sv_root ./"

------file: ncverilog.log----------
ncsim> run
Gimme_Int           6
show_vec_inC
a= 12345678
show_Logic_inC
a= 8765f320
aval 8765f320
bval f00f
mydata_struct_s.a: 9 
mydata_struct_s.b: 2b6 
mydata_struct_s.c: 35 
AA 35 
AA ffffffca 
Verilog a           9
Verilog b 2b6
Verilog c 0a
ncsim: *W,RNQUIE: Simulation is complete.
ncsim> exit
TOOL:    ncverilog    05.83-p003: 



Todd Mackett
Cadence Incisive
tmackett
Posts: 34
Online: User is Offline
9/05/2007 11:28 AM  


I'm reposting the files below because of the strange characters in the original posting:

----file: top.sv--------------
module top ();

// import functions do a call from SV to C
import "DPI-C" context addone_c= function int addone_sv(input int x);
import "DPI-C" context function void show_vec_inC(input bit ⎫:0] some_vec);
import "DPI-C" context function void show_logic_inC(input logic ⎫:0] some_vec);

typedef struct packed {
  int a;
  bit Η:0] b;
  bit Γ:0] c;
  } mydata_struct_s;
import "DPI-C" context function void pass_struct(inout mydata_struct_s t );

bit   ⎫:0] some_vec   = 32'h12345678;
logic ⎫:0] some_logic = 32'h8765X32Z;

mydata_struct_s mydata_struct_i;   

initial
begin
 $display("Gimme_Int %d",addone_sv(5));
 show_vec_inC(some_vec);  // pass reference per SV spec
 show_logic_inC(some_logic);  // pass reference per SV spec

 // stuff the structure with data
  mydata_struct_i.a = 9;
  mydata_struct_i.b = 10'b10_1011_0110;
  mydata_struct_i.c = 6'b11_0101;
  
pass_struct(mydata_struct_i);  // pass reference to packed struct

 $display("Verilog a %d",  mydata_struct_i.a);
 $display("Verilog b %h",  mydata_struct_i.b);
 $display("Verilog c %h",  mydata_struct_i.c);
   

end

endmodule


--------------file: mydpi.c------------
#include <stdio.h>
#include <svdpi.h>

// Copyright Cadence Design Systems, Todd Mackett 2007

// This is an example of manipulating packed data structure in SystemVerilog
// Use <install>/tools/inca/include/svdpi.h as a reference
 
int addone_c(int x) {
  return  x +1;
}

void show_vec_inC(svBitVecVal* x) {
   io_printf("show_vec_inC\n");
   io_printf("a= %x\n", *x);
}

// svLogicVecVal can have 0,1,X,Z
void show_logic_inC(svLogicVecVal* x) {
   io_printf("show_Logic_inC\n");
   io_printf("a= %x\n", *x);
   io_printf("aval %x\n", x->a);  // identical to aval bval as in PLI
   io_printf("bval %x\n", x->b);
}

// use VPI io_printf() instead of printf() to go to ncsim.log file

void pass_struct( svBitVecVal* x) {  // NOT const so that this can be modified
  // can use xΎ] to reference raw array
  // io_printf("Struct = %x, %x\n", xΎ], xΏ] );
  svBitVecVal aa;   // define a local svBitVecVal 
  // extract field a of SV "struct packed {...} mydata_struct_s

  svGetPartselBit(&aa , x, 16, 32);  // corresponds to mydata_struct.a
  io_printf("mydata_struct_s.a: %x \n", aa);
  
  svGetPartselBit(&aa , x, 6, 10);  // corresponds to mydata_struct.b
  io_printf("mydata_struct_s.b: %x \n", aa);

  svGetPartselBit(&aa , x, 0, 6);  // corresponds to mydata_struct.c
  io_printf("mydata_struct_s.c: %x \n", aa);
 
  io_printf("AA %x \n", aa);
  // do some manipulation on the local svBitVecVal
  aa = ~aa;  // invert the bits (some generic bit manipulation routine)

  // can do something like this too: just set the value of Verilog Structure
  // aa = 13; 
  io_printf("AA %x \n", aa);
 
  svPutPartselBit(x, aa, 0, 6);  // this will modify the Verilog structure 
 
}






Todd Mackett
Cadence Incisive
tmackett
Posts: 34
Online: User is Offline
9/05/2007 11:31 AM  

<BR></P>
<P>One more attempt to repost:<BR><BR><FONT size=2></P>
<P>module top ();</P>
<P>// import functions do a call from SV to C</P>
<P>import "DPI-C" context addone_c= function int addone_sv(input int x);</P>
<P>import "DPI-C" context function void show_vec_inC(input bit ⎫:0] some_vec);</P>
<P>import "DPI-C" context function void show_logic_inC(input logic ⎫:0] some_vec);</P>
<P>typedef struct packed {</P>
<P>int a;</P>
<P>bit Η:0] b;</P>
<P>bit Γ:0] c;</P>
<P>} mydata_struct_s;</P>
<P>import "DPI-C" context function void pass_struct(inout mydata_struct_s t );</P>
<P>bit ⎫:0] some_vec = 32'h12345678;</P>
<P>logic ⎫:0] some_logic = 32'h8765X32Z;</P>
<P>mydata_struct_s mydata_struct_i; </P>
<P>initial</P>
<P>begin</P>
<P>$display("Gimme_Int %d",addone_sv(5));</P>
<P>show_vec_inC(some_vec); // pass reference per SV spec</P>
<P>show_logic_inC(some_logic); // pass reference per SV spec</P>
<P>// stuff the structure with data</P>
<P>mydata_struct_i.a = 9;</P>
<P>mydata_struct_i.b = 10'b10_1011_0110;</P>
<P>mydata_struct_i.c = 6'b11_0101;</P>
<P></P>
<P>pass_struct(mydata_struct_i); // pass reference to packed struct</P>
<P>$display("Verilog a %d", mydata_struct_i.a);</P>
<P>$display("Verilog b %h", mydata_struct_i.b);</P>
<P>$display("Verilog c %h", mydata_struct_i.c);</P>
<P></P>
<P>end</P>
<P>endmodule</P>
<P></FONT>----------------<BR><BR><FONT size=2></P>
<P>#include <stdio.h></P>
<P>#include <svdpi.h></P>
<P>// Copyright Cadence Design Systems, Todd Mackett 2007</P>
<P>// This is an example of manipulating packed data structure in SystemVerilog</P>
<P>// Use <install>/tools/inca/include/svdpi.h as a reference</P>
<P></P>
<P>int addone_c(int x) {</P>
<P>return x +1;</P>
<P>}</P>
<P>void show_vec_inC(svBitVecVal* x) {</P>
<P>io_printf("show_vec_inC\n");</P>
<P>io_printf("a= %x\n", *x);</P>
<P>}</P>
<P>// svLogicVecVal can have 0,1,X,Z</P>
<P>void show_logic_inC(svLogicVecVal* x) {</P>
<P>io_printf("show_Logic_inC\n");</P>
<P>io_printf("a= %x\n", *x);</P>
<P>io_printf("aval %x\n", x->a); // identical to aval bval as in PLI</P>
<P>io_printf("bval %x\n", x->b);</P>
<P>}</P>
<P>// use VPI io_printf() instead of printf() to go to ncsim.log file</P>
<P>void pass_struct( svBitVecVal* x) { // NOT const so that this can be modified</P>
<P>// can use xΎ] to reference raw array</P>
<P>// io_printf("Struct = %x, %x\n", xΎ], xΏ] );</P>
<P>svBitVecVal aa; // define a local svBitVecVal </P>
<P>// extract field a of SV "struct packed {...} mydata_struct_s</P>
<P>svGetPartselBit(&aa , x, 16, 32); // corresponds to mydata_struct.a</P>
<P>io_printf("mydata_struct_s.a: %x \n", aa);</P>
<P></P>
<P>svGetPartselBit(&aa , x, 6, 10); // corresponds to mydata_struct.b</P>
<P>io_printf("mydata_struct_s.b: %x \n", aa);</P>
<P>svGetPartselBit(&aa , x, 0, 6); // corresponds to mydata_struct.c</P>
<P>io_printf("mydata_struct_s.c: %x \n", aa);</P>
<P></P>
<P>io_printf("AA %x \n", aa);</P>
<P>// do some manipulation on the local svBitVecVal</P>
<P>aa = ~aa; // invert the bits (some generic bit manipulation routine)</P>
<P>// can do something like this too: just set the value of Verilog Structure</P>
<P>// aa = 13; </P>
<P>io_printf("AA %x \n", aa);</P>
<P></P>
<P>svPutPartselBit(x, aa, 0, 6); // this will modify the Verilog structure </P>
<P></P>
<P>}</P>
<P> </P>
<P></FONT><BR><BR><BR>


Todd Mackett
Cadence Incisive
tmackett
Posts: 34
Online: User is Offline
5/14/2008 9:34 AM  


I'm just updating this topic to let people know that you can use irun to far more easily by doing this:

irun mydpi.c top.sv

#include <stdio.h>
#include <svdpi.h>

// This is an example of manipulating packed data structure in SystemVerilog
// Use <install>/tools/inca/include/svdpi.h as a reference
 
int addone_c(int x) {
  return  x +1;
}

void show_vec_inC(svBitVecVal* x) {
   io_printf("show_vec_inC\n");
   io_printf("a= %x\n", *x);
}

// svLogicVecVal can have 0,1,X,Z
void show_logic_inC(svLogicVecVal* x) {
   io_printf("show_Logic_inC\n");
   io_printf("a= %x\n", *x);
   io_printf("aval %x\n", x->a);  // identical to aval bval as in PLI
   io_printf("bval %x\n", x->b);
}

// use VPI io_printf() instead of printf() to go to ncsim.log file

void pass_struct( svBitVecVal* x) {  // NOT const so that this can be modified
  // can use xΎ] to reference raw array
  // io_printf("Struct = %x, %x\n", xΎ], xΏ] );
  svBitVecVal aa;   // define a local svBitVecVal 
  // extract field a of SV "struct packed {...} mydata_struct_s

  svGetPartselBit(&aa , x, 16, 32);  // corresponds to mydata_struct.a
  io_printf("mydata_struct_s.a: %x \n", aa);
  
  svGetPartselBit(&aa , x, 6, 10);  // corresponds to mydata_struct.b
  io_printf("mydata_struct_s.b: %x \n", aa);

  svGetPartselBit(&aa , x, 0, 6);  // corresponds to mydata_struct.c
  io_printf("mydata_struct_s.c: %x \n", aa);
 
  io_printf("AA %x \n", aa);
  // do some manipulation on the local svBitVecVal
  aa = ~aa;  // invert the bits (some generic bit manipulation routine)

  // can do something like this too: just set the value of Verilog Structure
  // aa = 13; 
  io_printf("AA %x \n", aa);
 
  svPutPartselBit(x, aa, 0, 6);  // this will modify the Verilog structure 
 
}






Todd Mackett
Cadence Incisive
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