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Subject: Help Needed for multiple transactions
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jaally
Posts: 32
Online: User is Offline
1/17/2008 4:43 AM  
Hello Friends,

    I'm coding a UVC(Universal Verification Component) in System Verilog Class Based methodology. For the protocol, which I've coded, I could successfully get one complete transaction. But I couldn't get second transaction or any successive transactions.

   I'm getting struck at "get_next_item"(for second trasaction)....I tried to debug but couldn't proceed further.

So, could someone help me in removing this problem so that I could get multiple transactions.

Thanks in advance,
Jalli
pjigar
Posts: 22
Online: User is Offline
1/17/2008 7:57 AM  
I think you are not creating custom sequence and setting default_sequence of the sequencer. Please look at the xbus uVC example on how to create custom sequence and use it by calling set_config_string() call.

e.g.
      set_config_string("*tx_agent.driver", "default_sequence", "cdn_pack_tlm_sequence");


By default, the sequencer will run a simple sequence which only creates one transaction.



Jigar Patel
Lead Consulting Engineer
Cadence Design Systems
jigar@cadence.com
jaally
Posts: 32
Online: User is Offline
1/18/2008 4:15 AM  
Thanks PJigar!
It did help me!
Regards,
Jalli
ramesh_pal_yadav
Posts: 13
Online: User is Offline
1/22/2008 10:52 PM  
Hi Jally,
I guess you Want to get Conigure Count  to Get Multiple transactions.
"urm_driver" has a int Variable 'count' with which u can have Multiple Transactions just as in eRM,
Use  set_config_int("*.driver","count",5);  in the Main_sve Class. you will get 5 Transactions for this Config.This will Solve your Problem.

Regards,
Ramesh Pal
jaally
Posts: 32
Online: User is Offline
1/28/2008 11:38 PM  
Hi Pal,

This is even cool! Anyway, thanks for that additional point.

Regards,
Jalli
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Forums > Functional Verification > SystemVerilog > Help Needed for multiple transactions


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