Thursday, January 08, 2009     Register | Login | Search | Contact Us
     

Many of you already received communications about the move of the Cadence user community into cadence.com. And many of you have already joined, with over 4000 registrations in the first two weeks.

The new Cadence Community enhances the ability of Cadence users to connect and collaborate. In addition to moving the community into cadence.com -- enabling single sign-on for community, Sourcelink and Cadence events -- the new site is organized around nine technology segments, giving you easy access to product information, training, forums and blogs. Some of the new features include:
  • Ability to respond to posts via e-mail
  • Technology-specific blogs
  • Latest Web 2.0 social networking capabilities
  • Public profile options
  • Private messaging
  • Friends lists
Visit the new Cadence Community today at www.cadence.com/community and join the discussions!

Registration note: Due to the scope of the enhancements and the new SSO registration system, we were not able to migrate existing cdnusers.org member accounts. So new registrations are required, but this enables a broader set of functionality we think you'll enjoy.

Forum note: Under the guidance of forum moderators, we have taken the 20+ cdnusers.org forums and consolidated them into 11 forums on the new site. Posts have been brought over so you can leverage that posting history. CDNusers forums will be set to read only starting 7/30, and cdnusers.org will be redirected to the new community on 8/4.

Best regards,
Mike and Tom

Michael A. Catrambone - Steering Committee Chairman
Distinguished Engineer
PCB/Mechanical
UTStarcom, Inc.

Tom Diederich
Cadence Community Manager
Home
Forums
Topic Replies Views Last Post
Using ddsSyncWithForm with tabbed forms
by Moderator in PCB Design
0 2349
by Moderator
11/18/2004 1:34 PM
using CTGen
by kdurais in Floorplanning, Place and route
0 2323
by kdurais
8/17/2006 8:51 AM
Using Artisan standard cells in Verilog??
by student1 in SystemVerilog
0 2261
by student1
11/23/2006 7:31 AM
Using a smaller anti-pad than DRC on positive planes
by mikewr007 in PCB Design
0 923
by mikewr007
3/24/2008 1:00 PM
Using a PSpice advanced part into a subcircuit
by igbarbero in Custom IC Electrical Design
0 505
by igbarbero
5/22/2008 12:07 AM
usefulskew,drivercell
by madhavi.komma in Floorplanning, Place and route
0 2004
by madhavi.komma
5/08/2007 9:50 PM
Unsuccessful route -- cannot find a path through the obstacles.,Attribute definition not found
by ragesh in PCB Design
0 2194
by ragesh
7/03/2006 9:33 AM
unknown netlist format
by vinhly in PCB Design
0 2501
by vinhly
10/08/2007 10:53 AM
Unable to recognize create_generated_clock
by arunrach in Synthesis and test
0 319
by arunrach
7/18/2008 3:17 PM
Unable to get USB dongle for Orcad from local India rep
by vjaswa in Suggestions
0 2632
by vjaswa
8/31/2007 4:33 AM
Ultiboard translation
by Dave Elder in PCB Design
0 2418
by Dave Elder
8/08/2006 3:11 PM
Transition Coverage
by davyzhu in SystemVerilog
0 2653
by davyzhu
6/26/2007 1:46 AM
Transfering attributes from CIS to Layout
by bulldog in PCB Design
0 722
by bulldog
3/12/2008 4:28 PM
Tracking Customized Metrics
by hcarter in Verification Planning
0 2883
by hcarter
8/18/2007 6:37 PM
trace events using Irun
by jaally in SystemVerilog
0 863
by jaally
4/29/2008 3:14 AM
tip: to avoid xtalk on clock nets
by lisiang in Floorplanning, Place and route
0 2665
by lisiang
4/01/2007 11:43 PM
Tip of the Week:How to add Wirebond Guide Paths to all DIE at once
by jgallag in IC Package, SiP and Co-design
0 3087
by jgallag
9/12/2007 2:30 PM
Tip of the Week: Using new Constraint Manager Class Object with SCM
by gfruiz in IC Package, SiP and Co-design
0 3071
by gfruiz
9/04/2007 11:30 AM
Tip of the Week: Toggle quickly between cellviews and editors
by Hugh in Custom IC Electrical Design
0 936
by Hugh
4/17/2008 11:22 AM
Tip of the Week: Searching for design variables in ADE hierarchy
by Hugh in Custom IC Electrical Design
0 2167
by Hugh
12/07/2007 6:55 AM


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