Interview: Cisco’s Michael Umina Tests New PCB Global Routing Technology An Interview with Michael Umina Cisco Systems Discuss this content or topic in the forums An interview with Michael Umina, Cisco Systems on his experience with the new Cadence Global Route Environment The Cadence Designer Network user community recently talked with Michael Umina, ECAD Applications Engineer, at Cisco’s New England Development Center about his initial work with the soon-to-be released Global Route Environment Technology for Allegro PCB design. Michael, who has been with Cisco for 9 years, has over 17 years experience designing PCBs. cdnusers: Michael, What type of designs are you working on? Michael: I work on many different products lines and designs, primarily backplanes and network line cards. cdnusers: Those are very complex designs. What are your biggest challenges? Michael: I’d say dealing with different high-speed requirements. Most of the busses cannot accept vias and layer transitioning—most bundles of busses need to stay within the same layer for timing reasons. Layer consideration is also very important to reduce stub lengths of the z-axis portion of a via that is not used as part of the signal path. cdnusers: How is that different from challenges you had previously? Michael: In the past, it was just clocks that had timing constraints, and things moved slow enough that full busses of interfaces did not all have to be so tightly held together and keep the same type of layer structure to work and switch properly. Today, almost everything on the board has some type of timing and return path constraint whereas in the past it was just a handful of clocks. cdnusers: Tell us about your experience working with routing software in this context. Michael: I’ve been using autorouters for over 17 years on many different types of products. I’ve used most of the routers on the market. There are a couple of issues relevant to complex designs—manual pin escaping and manual routing of critical differential pairs. In most of my designs, I manually pin escape and do not rely on the autorouter. Autorouters have the capability of putting in pin escapes, but I’ve always done them manually because the autorouter results have never been good enough. I have yet to accept autorouting for differential pairs. Autorouters just don't do the job to anyone’s acceptance. We end up spending so much time cleaning them up, it is easier to just do it manually and get it right the first time. In the past few years, almost all of my designs have been hand-routed because of the inability of the Allegro PCB Router to meet all of the requirements. I would say 90 percent of my designs in the past two years have been hand-routed. cdnusers: Is that because in the past two years the boards have become more complex? Michael: Yes. The problem is the inability to be able to direct the router for complex requirements and for it to unscramble and connect certain busses without any vias or layer transitioning. cdnusers: Has the new Cadence Global Routing Environment changed things? Michael: Yes. The ability to flow bundles allows you to do some much-needed planning and directing that was not previously available—now you can dictate which layers nets are allowed to be on by their groups and where they can transition. Instead of being forced on the horizontal/vertical structure, which you were stuck with in the past, you can actually direct the router any way you want. Any particular layer can be horizontal on one segment, vertical in another segment. Before, you could only set a global parameter in the design. cdnusers: Can you tell us more about flow planning? Michael: Once you have created your bundles, you can start directing them around the board on your intended path. For instance, if you have a bus that goes from the lower left to the upper right side of the board, you can direct it to follow a path in an area that you know will not be congested. This is also helpful in avoiding areas that could introduce noise in the lines such as a power supply. In the past, the only way to achieve something like this would be with the use of complex fences and keepout areas. Because of the time it took to do this without flows, I would just do this manually. So now, rather than putting each individual connection in manually, you can take a whole group of them and direct them relatively where you want. Then the router will handle the tedious point-to-point connections and length tuning. cdnusers: So you can do all this before you start routing? Michael: Correct—the planning can all be done before you start any autorouting. I think it could be more accurately described as a phase of the routing. It is more of an auto-interactive process. cdnusers: You are a Global Route Environment beta user, right? Michael: Yes. The product works as well as I would expect at this stage, and I expect that it will come along and work much faster and more accurately when it is released. cdnusers: What type of design did you test on? Michael: I used it on a Cadence-provided demo board and on a current Cisco product to plan and route some DDR2 memory busses. One thing I discovered is that the router can be used as a presentation tool. We had some memory busses to a DIM socket that had been crossed. I opened up the router and used it to display how the bundles had crossed and was able to communicate which should be swapped. Once it was done, we could see the result of swapping them. It allows us to communicate better with people who don’t have a lot of CAD knowledge. cdnusers: What do you think is the most important feature in the Global Route Environment? Michael: Flowing—the ability to electronically capture the strategy/design intent of how I would approach the design. Autobundle is also important because it would take too long to manually go through and select the nets you need bundled. Flowing and directing which layers the nets reside on is important. The ability to put in a transition via and change which layers are allowed on either side of the flow via makes Global Route Environment work like someone would manually route. So now you can plan for multiple layers to be allowed horizontally in this area, but maybe vertically in another area of the board. It removes a lot of manual work and allows you to step back and just direct the board being designed. Autobundle is the feature used to create bundles so that the PCB designer can assign flows. It will grab nets that are in a group based on their bus properties, or any other way you define them. In future releases you will have the ability to do your bundling through the Constraint Manager. For instance, you could select a group of nets with a relative propagation delay constraint and make them a bundle. You can then take these bundles and assign the appropriate layers. Many of these nets have to be on one layer because the memory supplier has requirements on how groups of data lanes address and control busses; all have to follow layer structures. So if they do not work on one particular layer, they all have to shift to another one—they can’t be on various layers in the stack up. The autobundler feature allows me to select the correct nets fairly quickly, assign layers to them, and then see how they cross and if there's any way I can redirect them or change the layers we're going to put them on. In the past, you could only do that by highlighting the rat’s nest and trying to see what was going on. Autobundle gave a nice picture of which bundles of nets crossed each other—or wouldn’t be able to come out of their driver into their destination without having to cross something on the same layer. Because of the one layer requirements a cross would make it impossible to connect. cdnusers: How do you think the Global Route Environment will affect your design cycle? Michael: That is hard to say since we are just in beta and have not used it to complete any real work. I expect since we are manually routing all boards right now it should decrease the time it takes to route. It also seems like we'll be able to engage in a concurrent engineering model more effectively. cdnusers: Anything else you’d like to tell us about the Global Route Environment? Michael: I hope it relieves the tendonitis I have from manually routing. And I would hope that, in the future, we'll have the ability to collaborate a bit more, so one person, maybe a hardware engineer, could use the router ahead of time to determine where we want things to be, get the constraints, and then be able to import them. This would help with some of the planning of the placement. cdnusers: Because our members are engineers, we like to ask a few questions about work in general. How do you manage your stress when you are working? Michael: I do a lot of bicycling—usually at lunchtime or early morning. cdnusers: Where do you do your best thinking? Michael: Probably driving home from work, thinking about what I did during the day. Stuff always pops up after you leave work. cdnusers: How do you relax at home after a day of routing? Michael: I have two young kids, so I don’t think much about routing when I am at home. Summary About the author Michael started designing printed circuit boards in 1990 at Prodesign, a design service bureau located in Newton, Mass. as part of an informal work-study program while he was in high school. He continued with on-the-job training while completing an Associate in Science CAD Technology from Middlesex Community College. Later, he worked as a designer at Applied CAD Knowledge, a design service bureau. Today, as a senior-level high-speed designer at Cisco Systems, he is involved with several different product lines that deliver different levels of design technologies and challenges. Cisco is the worldwide leader in networking that is “Changing the Way We Work, Live, Play and Learn”. Information about Cisco can be found at http://www.cisco.com. Ratings   This content has been rated 4.7 out of 5 by other users   Comments