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 | |  | | | | | Xtreme III Product Launch
An Interview with Ping–Sheng Tseng
Cadence Design Systems, Inc. | |
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Q. Cadence has just announced the launch of Xtreme III. As the architect for this product , tell us about your background working with this technology.
A. I am an inventor and the system architect of the Xtreme system since its inception in 2000. In the past six years, we have been constantly advancing our unique integrated simulation, acceleration and emulation technologies on the Xtreme platform. Xtreme III is our latest product with our most advanced software and hardware technologies combined.
Q. In any new release there are a lot of new features that benefit users, but in your opionion, what is the one most important new feature to users of this product?
A.On the hardware side, the new machine has 2X capacity and 2X speed improvement over the current Xtreme Server machine.
On the software side, we are formally introducing our behavioral processor compiler technology, System Verilog Assertion support and Incisive verification environment integration.
Q. Tell us how this feature works
A.The speed and capacity scaling of the Xtreme system is very much like PC systems. The speed and the memory capacity of PC systems scale with the advances of microprocessor and DRAM technologies to meet the ever increasing demand in general computing applications. The Xtreme system scales with the advances of FPGA technology in both speed and gate count capacity to meet the ever increasing demand in simulation acceleration and emulation applications. The 2X performance and 2X gate count capacity improvement in Xtreme III system come from the latest FPGA technology. Just like PC systems, we can deliver all these improvements while keeping the physical dimensions and the power requirement the same as the Xtreme server for ease of installation in a typical server room environment.
The Xtreme system is not just a raw hardware box populated with the latest FPGA chips. You can find many prototyping boards in the market that are also populated with the latest FPGA chips. All these FPGA boards require the users to combine many independent tools and manual interventions to build custom verification solutions. It is not only time-consuming to build custom verification solutions but also difficult to make the system work properly.
What's unique about the Xtreme system is its complete simulation acceleration and emulation solution through the XSIM environment. The XSIM environment is a software system that integrates HDL compilation, design partition, FPGA compilation and runtime simulator binding, all through a common database. The XSIM environment is the industry only simulation acceleration and emulation solution that can provide dynamic state-swapping-and-continuation between the hardware logic emulation engine and the software simulation engine. The goal of XSIM technology is to make the hardware box transparent from the user so that the user can use the Xtreme box just like a software simulator.
We have been developing the XSIM technology for almost 8 years. In the past, we have been mapping RTL objects into the Xtreme box while leaving the behavioral verification objects in the software simulator. Due to the limit in gate and memory capacity of older FPGA chips, this has been a balanced strategy to manage the overall system complexity. As the FPGA gate count and memory capacity double in the Xtreme III system, it becomes practical to also map behavioral verification objects into the Xtreme III box for the next level of performance gain. In the past, we have seen that leaving verification objects in the software simulator could create a performance bottleneck in some applications. Our new behavioral processor compiler technology can significantly improve the performance of these applications by mapping behavioral verification objects automatically into the behavioral processors in the Xtreme III. Similarly, mapping assertion statements through static assertion synthesis can easily create finite state machines with exponential number of states that could not fit into the Xtreme box before. With the use of behavioral assertion processors and block memories to manage dynamic state expansions, it becomes practical to map System Verilog Assertion statements into the XtremeIII.
For the first XtremeIII release, we have done Xtreme integration with the Incisive Design Team Manager and the SimVision debugging environment. More integration will come in the future releases especially in the integration with the Incisive Unified Simulator.
Q. Now tell us about a couple more features that users will find helpful in creating their designs. (Doing verification)
A.Try our new behavioral processor compiler (+bc) technology that will map behavioral Verilog and System Verilog DPI constructs into XtremeIII for acceleration. Before this new release, we used to map RTL design objects into Xtreme but leave out behavioral verification objects in the software simulator. Keeping behavioral objects in software simulator has been the performance bottleneck in some applications. With the new behavioral processor compiler technology for Xtreme III, we can eliminate this performance bottleneck for those applications.
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An inventor and the system architect of the Xtreme system discusses the latest release.
About the author
Dr. Ping Tseng is a Cadence Fellow in Verification Acceleration and has 15 years of experience in the EDA industry. Before joining Cadence, Dr. Tseng co-founded Axis System and developed the Xtreme product - the industrial first unified simulation/acceleration/emulation verification platform. Dr. Tseng is the inventor of 10 US patents on hardware-based verification technologies. Dr. Tseng holds a Ph.D. in computer engineering from Carnegie Mellon University. |
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