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 | |  |  | | | | Allegro Design Entry HDL Product Review
Harry D. Bartley
CAD Applications Engineer, Tektronix , Inc. | |
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Length of experience with the product
14 years
Types of design with the product
High Speed Test Tools
Other products used in the design flow
Tools in the Allegro front to back flow
Product Overview
I support the use of the front end tools in the design creation process.
We use Allegro Design Entry HDL to create all of our board schematics. We have customized the Project Manager to provide Engineers easy access to the commonly used tools. When a project is opened, they see the following in one section of the Project Manager window.
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Setup |
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(Project Customization) |
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Schematic |
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(Design Entry HDL) |
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Allegro SI |
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(Signal Integrity) |
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Schematic ERRORS & INFO |
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(script) |
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Rules Checker |
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Packager-XL |
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(Export/Import) |
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Backannotate Schematic |
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(script) |
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Extract Packager Netlists |
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(script) |
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Cross Referencer |
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Verify using Part Manager |
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Cleanup for storage |
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(script) |
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Submit to Storage |
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If they want to modify the library list, grid setting, custom variables, panning, or other user preferences, they may select "Setup". These modifications apply only to the current project.
When the schematic is opened, the user has access to all of our library symbols. We use the part number as the primary key property to select the board layout footprint, or Jedec_type. We have two additional key properties, BOMSKT and PACK_TYPE. With three key properties we have flexible control over specific footprint and pin count requirements.
We need access to additional web tools. We have tools that allow us to search our libraries by part number, and place on-line requests to the librarians for new parts. We can not access those web tools directly from the Project Manager. We use the Web > Go to Favorites selection from the Project Manager. When doing this, we always change the default, and select "Use External Browser". We have added several web links, and one web site with all of the links, so the user can select a specific web tool, or open a general site with multiple links.
The schematics created may be two pages, ten pages, or over one-hundred pages in length. We create simple flat schematics, simple hierarchical schematics, and complex hierarchical schematics. The simple flat schematics have all pages at the same level, and in the same directory. Simple hierarchical schematics share many characteristics with the flat designs, but the schematics are sub-divided into blocks. For a simple hierarchy, each block is unique, and is used only once in the design. A complex hierarchical design has one or more blocks that are used multiple times in the design.
The use of hierarchy allows the design to be more easily divided for function, or for division of work. It is virtually impossible to have multiple users working at the same time on the same design. We have successfully had multiple users on a project with one copy of the master project, and individual copies for each user. One person can then control integration of the multiple copies of the design.
Hierarchy also allows design reuse. A block may be packaged as a sub-design. The sub-design may have a layout module created. When the top level design is packaged, the sub-design packaging information is reused, each time the block is encountered. A suffix is appended to the reference designators to keep them unique. When the design is placed in Allegro PCB Editor, the existing module is placed instead of placing each individual part. This has allowed us to control critical signals, and make them exactly the same in each channel of a multi-channel design.
We use the Constraint Manager on most designs. We assign net properties to control trace length, match traces, and control trace width and spacing by layer. In conjunction with the Constraint Manager we use the Model Assignment tool. That allows us to assign models and create extended nets (xnets). We can then control the trace length through passive components. Use of the Constraint Manager has been a challenge, and requires more in depth knowledge of the tools and their interrelationships.
We have not fully integrated Allegro PCB SI into our design flow, but have made the tool readily available for current use.
In our design flow, we use the Rules Checker to verify we have not overlooked power pins assigned in the symbol chips.prt files. We do not extensively use any of the other rules.
We use Design Sync, formerly known as Packager-XL to create the parts list and netlist files for Allegro PCB Editor.
When the user wants to review a netlist, they run Extract Packager Netlists to create netlist information that combines the pstxnet signals, and the pstchip signals. To see a conventional netlist, they must generate a netlist report from the Allegro PCB Editor.
Nearing the end of our schematic flow, are two more tools. We use the Cross Referencer on all designs to create reports used to locate nets and symbols in the design. These reports are used by layout, support, and manufacturing. The Part Manager has been recently added. We use this tool to verify that the values on capacitors, resistors, and inductors match the values for the specific part number. When problems are found, they can be easily changed using this same tool.
We have our own special properties for Bill of Materials (BOM). We can support multiple builds from a single schematic. Our customized Project Manager gives direct access to scripts to verify BOM generation. We also have scripts that will extract part numbers from a design and report their current status.
The Part Manager and the Global Update tools are particularly good tools that work on specific pages or the entire design. I have found these tools to be easy to use, reliable, and dependable. I wish all of the other tools met these same criteria.
Installation and configuration:
We are currently using PC based tools. It has been difficult to keep all users on the same version of the release, so need access to several different releases at the same time. I do not do the installation and configuration, but I have access to a script that easily allows me to switch between releases.
Documentation and help:
I create internal documentation and training material. Cadence has improved their documentation, provided tutorials and video demonstrations that make it easier to understand their desired usage of commands and processes. They tend to partially change the names of tools, so the documentation contains references to both old and new tool names.
Ease of use:
The basic schematic tools are easy to use. Flat schematics and simple hierarchy are also straight forward and fairly easy. Complex hierarchy and the interaction of Constraint Manager, Occurrence properties, and schematic properties get very complicated.
Performance:
All of the tools perform well. The Constraint Manager has been the only memory hog. On a large design, it can take an extended period of time to complete tasks.
Results:
Design reuse has made it possible to create exactly the same channels in a multi-channel design. We push these tools to, and beyond their limits. We would always like more. The interaction between most tools is transparent to the user.
| What's good
Enhancements in the tools over the past 14 years have allowed us to create complex designs in a timely manner. I wish all of the enhancements worked as well as Part Manager and Global Update.
What could be better
The interaction between Constraint Manager, Occurrence properties, and schematic properties has been difficult to understand. The incremental introduction of the Constraint Manager has been most confusing, eroding user confidence in the tools beyond the Constraint Manager.
About the author
Born the youngest of eight children living near the South Dakota Badlands, Harry worked his way through Humboldt State College, earning a Bachelors Degree in History with a minor in Industrial Arts. Graduate classes in Education and Administration earned certification in Secondary Education Instruction and in Secondary Administration for the state of California.
Ten years as a High School Drafting Teacher in Marysville, California was interrupted by two years in the Army Infantry, primarily as a Drill Instructor at Ft. Ord, California.
Harry has a broad background in CAD and CAE. Eight years in training and
support of mechanical CAD, four years supporting PCB layout tools, two years supporting Mentor Graphics schematic capture tools, and fourteen years supporting Cadence schematic capture tools for manufacturing and engineering companies, including: Auto-trol, Stearns Roger Engineering, Professional Technology, Bausch&Lomb, and Tektronix.
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