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|  Getting PlasteredApril 16, 2008, Dr Alison Burdett - Toumaz Technology LtdToumaz Technology has developed Sensium, an ultra low power wireless sensor interface and transceiver platform for a digital plaster style application that allows for remote real-time health care monitoringRead more » CDB to OA—The Migration ReportJune 13, 2007, Gernot Heiling - austriamicrosystemsWwinner of the Custom IC Best Paper Award at both CDNLive! EMEA and Silicon Valley, this presentation details the challenges and pitfalls faced during migration from ODB to OA.Read more » Constraint Driven Custom Design in IC6.1.0April 30, 2007, Karun Sharma - Cadence Design Systems With the release of IC6.1.0 the full custom circuit design methodology received a makeover. This paper discusses the new front-to-back constraint driven design methodology unveiled by IC6.1.0Read more » Disinherited ConnectionsApril 25, 2007, James Roberts - QualcommExplores the next level of multi-rail methodology, doing away with netSet properties and reverting back to explicit pin connections; yet retaining the transparency and automation which inherited connections offered.Read more » A Modular PDK Regression Testing SystemMarch 20, 2007, Andy Weilert - Avago Technologies Brute-force regression testing involves manual interactions with the design kit and visual inspection of the resulting data -- a tedious and error-prone process. Some PDK developers have automated tests...Read more » Spice In: the Unified Analog Import ToolJanuary 15, 2007, Vivek Astvansh - CadenceThis paper introduces you to Spice In - the unified analog import tool that will import SPICE/Spectre/CDL and other SPICE-like analog net lists into the DFII flow. By bridging the flow gap, Spice In will promote the use of various Cadence tools in the Environment, Simulation, and Verification domains. Spice In uses an extensible architecture that can be enhanced to read any Spice-like analog net list. The resulting DFII view can be a simple net list view, or a schematic view.Read more » Higher Quality Designs – a Configuration Management ApproachJanuary 9, 2007, Rom Bronfman - Saifun SimiconductorsThe challenge in complex chip architectures, such as Saifun's flash memories, lies in synchronizing between several cross-dependant sub-projects, from PDK translation, through custom circuit, logic and layout design, to verification and backend analysis. In Saifun we met this challenge by creating a multi-design-flow environment based on strict methodologies enforced through policy checks, thus buffering between inputs and outputs of different flows and improving design quality. The system, which is implemented using Synchronicity's configuration management tools and integrated into Cadence's design environment, enables Saifun to successfully deliver several high quality products per year.Read more » | |
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